clk/tegra/clk-pll.c

237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
238 #define pll_writel_base(val, p) pll_writel(val, p->params->base_reg, p)
239 #define pll_writel_misc(val, p) pll_writel(val, p->params->misc_reg, p)
241 #define pll_writel_sdm_din(val, p) pll_writel(val, p->params->sdm_din_reg, p)
242 #define pll_writel_sdm_ctrl(val, p) pll_writel(val, p->params->sdm_ctrl_reg, p)
364 		pll_writel(val, pll->params->iddq_reg, pll);
371 		pll_writel(val, pll->params->reset_reg, pll);
409 		pll_writel(val, pll->params->reset_reg, pll);
415 		pll_writel(val, pll->params->iddq_reg, pll);
426 		pll_writel(val, pll->params->ssc_ctrl_reg, pll);
436 		pll_writel(val, pll->params->ssc_ctrl_reg, pll);
1633 	pll_writel(val, pll->params->aux_reg, pll);
1647 	pll_writel(val, PLLE_SS_CTRL, pll);
1669 	pll_writel(val, PLLE_SS_CTRL, pll);
1671 	pll_writel(val, PLLE_SS_CTRL, pll);
1674 	pll_writel(val, PLLE_SS_CTRL, pll);
1685 	pll_writel(val, pll->params->aux_reg, pll);
1688 	pll_writel(val, pll->params->aux_reg, pll);
1695 	pll_writel(val, XUSBIO_PLL_CFG0, pll);
1698 	pll_writel(val, XUSBIO_PLL_CFG0, pll);
1705 	pll_writel(val, SATA_PLL_CFG0, pll);
1711 	pll_writel(val, SATA_PLL_CFG0, pll);
1863 		pll_writel(val_aux, pll->params->aux_reg, pll);
2257 	pll_writel(PLLCX_MISC1_DEFAULT, pll_params->ext_misc_reg[0], pll);
2258 	pll_writel(PLLCX_MISC2_DEFAULT, pll_params->ext_misc_reg[1], pll);
2259 	pll_writel(PLLCX_MISC3_DEFAULT, pll_params->ext_misc_reg[2], pll);
2380 	pll_writel(PLLSS_CFG_DEFAULT, pll_params->ext_misc_reg[0], pll);
2381 	pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[1], pll);
2382 	pll_writel(PLLSS_CTRL1_DEFAULT, pll_params->ext_misc_reg[2], pll);
2487 	pll_writel(val, PLLE_SS_CTRL, pll);
2512 	pll_writel(val, PLLE_SS_CTRL, pll);
2514 	pll_writel(val, PLLE_SS_CTRL, pll);
2517 	pll_writel(val, PLLE_SS_CTRL, pll);
2547 	pll_writel(val, pll->params->aux_reg, pll);