Lines Matching refs:common
167 .common = {
207 .common = {
439 &pll_ddr_clk.common.hw,
508 &pll_cpux_clk.common,
509 &pll_audio_base_clk.common,
510 &pll_video_clk.common,
511 &pll_ve_clk.common,
512 &pll_ddr_clk.common,
513 &pll_periph0_clk.common,
514 &pll_gpu_clk.common,
515 &pll_periph1_clk.common,
516 &pll_de_clk.common,
517 &cpux_clk.common,
518 &axi_clk.common,
519 &ahb1_clk.common,
520 &apb1_clk.common,
521 &apb2_clk.common,
522 &ahb2_clk.common,
523 &bus_ce_clk.common,
524 &bus_dma_clk.common,
525 &bus_mmc0_clk.common,
526 &bus_mmc1_clk.common,
527 &bus_mmc2_clk.common,
528 &bus_nand_clk.common,
529 &bus_dram_clk.common,
530 &bus_emac_clk.common,
531 &bus_ts_clk.common,
532 &bus_hstimer_clk.common,
533 &bus_spi0_clk.common,
534 &bus_spi1_clk.common,
535 &bus_otg_clk.common,
536 &bus_ehci0_clk.common,
537 &bus_ehci1_clk.common,
538 &bus_ehci2_clk.common,
539 &bus_ehci3_clk.common,
540 &bus_ohci0_clk.common,
541 &bus_ohci1_clk.common,
542 &bus_ohci2_clk.common,
543 &bus_ohci3_clk.common,
544 &bus_ve_clk.common,
545 &bus_tcon0_clk.common,
546 &bus_tcon1_clk.common,
547 &bus_deinterlace_clk.common,
548 &bus_csi_clk.common,
549 &bus_tve_clk.common,
550 &bus_hdmi_clk.common,
551 &bus_de_clk.common,
552 &bus_gpu_clk.common,
553 &bus_msgbox_clk.common,
554 &bus_spinlock_clk.common,
555 &bus_codec_clk.common,
556 &bus_spdif_clk.common,
557 &bus_pio_clk.common,
558 &bus_ths_clk.common,
559 &bus_i2s0_clk.common,
560 &bus_i2s1_clk.common,
561 &bus_i2s2_clk.common,
562 &bus_i2c0_clk.common,
563 &bus_i2c1_clk.common,
564 &bus_i2c2_clk.common,
565 &bus_uart0_clk.common,
566 &bus_uart1_clk.common,
567 &bus_uart2_clk.common,
568 &bus_uart3_clk.common,
569 &bus_scr0_clk.common,
570 &bus_scr1_clk.common,
571 &bus_ephy_clk.common,
572 &bus_dbg_clk.common,
573 &ths_clk.common,
574 &nand_clk.common,
575 &mmc0_clk.common,
576 &mmc0_sample_clk.common,
577 &mmc0_output_clk.common,
578 &mmc1_clk.common,
579 &mmc1_sample_clk.common,
580 &mmc1_output_clk.common,
581 &mmc2_clk.common,
582 &mmc2_sample_clk.common,
583 &mmc2_output_clk.common,
584 &ts_clk.common,
585 &ce_clk.common,
586 &spi0_clk.common,
587 &spi1_clk.common,
588 &i2s0_clk.common,
589 &i2s1_clk.common,
590 &i2s2_clk.common,
591 &spdif_clk.common,
592 &usb_phy0_clk.common,
593 &usb_phy1_clk.common,
594 &usb_phy2_clk.common,
595 &usb_phy3_clk.common,
596 &usb_ohci0_clk.common,
597 &usb_ohci1_clk.common,
598 &usb_ohci2_clk.common,
599 &usb_ohci3_clk.common,
600 &h5_dram_clk.common,
601 &dram_ve_clk.common,
602 &dram_csi_clk.common,
603 &dram_deinterlace_clk.common,
604 &dram_ts_clk.common,
605 &de_clk.common,
606 &tcon_clk.common,
607 &tve_clk.common,
608 &deinterlace_clk.common,
609 &csi_misc_clk.common,
610 &csi_sclk_clk.common,
611 &csi_mclk_clk.common,
612 &ve_clk.common,
613 &ac_dig_clk.common,
614 &avs_clk.common,
615 &hdmi_clk.common,
616 &hdmi_ddc_clk.common,
617 &mbus_clk.common,
618 &gpu_clk.common,
622 &pll_audio_base_clk.common.hw
639 &pll_periph0_clk.common.hw,
644 [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw,
645 [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw,
650 [CLK_PLL_VIDEO] = &pll_video_clk.common.hw,
651 [CLK_PLL_VE] = &pll_ve_clk.common.hw,
652 [CLK_PLL_DDR] = &pll_ddr_clk.common.hw,
653 [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw,
655 [CLK_PLL_GPU] = &pll_gpu_clk.common.hw,
656 [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw,
657 [CLK_PLL_DE] = &pll_de_clk.common.hw,
658 [CLK_CPUX] = &cpux_clk.common.hw,
659 [CLK_AXI] = &axi_clk.common.hw,
660 [CLK_AHB1] = &ahb1_clk.common.hw,
661 [CLK_APB1] = &apb1_clk.common.hw,
662 [CLK_APB2] = &apb2_clk.common.hw,
663 [CLK_AHB2] = &ahb2_clk.common.hw,
664 [CLK_BUS_CE] = &bus_ce_clk.common.hw,
665 [CLK_BUS_DMA] = &bus_dma_clk.common.hw,
666 [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw,
667 [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw,
668 [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw,
669 [CLK_BUS_NAND] = &bus_nand_clk.common.hw,
670 [CLK_BUS_DRAM] = &bus_dram_clk.common.hw,
671 [CLK_BUS_EMAC] = &bus_emac_clk.common.hw,
672 [CLK_BUS_TS] = &bus_ts_clk.common.hw,
673 [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw,
674 [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
675 [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw,
676 [CLK_BUS_OTG] = &bus_otg_clk.common.hw,
677 [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw,
678 [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw,
679 [CLK_BUS_EHCI2] = &bus_ehci2_clk.common.hw,
680 [CLK_BUS_EHCI3] = &bus_ehci3_clk.common.hw,
681 [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw,
682 [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw,
683 [CLK_BUS_OHCI2] = &bus_ohci2_clk.common.hw,
684 [CLK_BUS_OHCI3] = &bus_ohci3_clk.common.hw,
685 [CLK_BUS_VE] = &bus_ve_clk.common.hw,
686 [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw,
687 [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw,
688 [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw,
689 [CLK_BUS_CSI] = &bus_csi_clk.common.hw,
690 [CLK_BUS_TVE] = &bus_tve_clk.common.hw,
691 [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw,
692 [CLK_BUS_DE] = &bus_de_clk.common.hw,
693 [CLK_BUS_GPU] = &bus_gpu_clk.common.hw,
694 [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw,
695 [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw,
696 [CLK_BUS_CODEC] = &bus_codec_clk.common.hw,
697 [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
698 [CLK_BUS_PIO] = &bus_pio_clk.common.hw,
699 [CLK_BUS_THS] = &bus_ths_clk.common.hw,
700 [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw,
701 [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw,
702 [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw,
703 [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw,
704 [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
705 [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw,
706 [CLK_BUS_UART0] = &bus_uart0_clk.common.hw,
707 [CLK_BUS_UART1] = &bus_uart1_clk.common.hw,
708 [CLK_BUS_UART2] = &bus_uart2_clk.common.hw,
709 [CLK_BUS_UART3] = &bus_uart3_clk.common.hw,
710 [CLK_BUS_SCR0] = &bus_scr0_clk.common.hw,
711 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
712 [CLK_BUS_DBG] = &bus_dbg_clk.common.hw,
713 [CLK_THS] = &ths_clk.common.hw,
714 [CLK_NAND] = &nand_clk.common.hw,
715 [CLK_MMC0] = &mmc0_clk.common.hw,
716 [CLK_MMC0_SAMPLE] = &mmc0_sample_clk.common.hw,
717 [CLK_MMC0_OUTPUT] = &mmc0_output_clk.common.hw,
718 [CLK_MMC1] = &mmc1_clk.common.hw,
719 [CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw,
720 [CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw,
721 [CLK_MMC2] = &mmc2_clk.common.hw,
722 [CLK_MMC2_SAMPLE] = &mmc2_sample_clk.common.hw,
723 [CLK_MMC2_OUTPUT] = &mmc2_output_clk.common.hw,
724 [CLK_TS] = &ts_clk.common.hw,
725 [CLK_CE] = &ce_clk.common.hw,
726 [CLK_SPI0] = &spi0_clk.common.hw,
727 [CLK_SPI1] = &spi1_clk.common.hw,
728 [CLK_I2S0] = &i2s0_clk.common.hw,
729 [CLK_I2S1] = &i2s1_clk.common.hw,
730 [CLK_I2S2] = &i2s2_clk.common.hw,
731 [CLK_SPDIF] = &spdif_clk.common.hw,
732 [CLK_USB_PHY0] = &usb_phy0_clk.common.hw,
733 [CLK_USB_PHY1] = &usb_phy1_clk.common.hw,
734 [CLK_USB_PHY2] = &usb_phy2_clk.common.hw,
735 [CLK_USB_PHY3] = &usb_phy3_clk.common.hw,
736 [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
737 [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw,
738 [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw,
739 [CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw,
741 [CLK_DRAM_VE] = &dram_ve_clk.common.hw,
742 [CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
743 [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw,
744 [CLK_DRAM_TS] = &dram_ts_clk.common.hw,
745 [CLK_DE] = &de_clk.common.hw,
746 [CLK_TCON0] = &tcon_clk.common.hw,
747 [CLK_TVE] = &tve_clk.common.hw,
748 [CLK_DEINTERLACE] = &deinterlace_clk.common.hw,
749 [CLK_CSI_MISC] = &csi_misc_clk.common.hw,
750 [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw,
751 [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw,
752 [CLK_VE] = &ve_clk.common.hw,
753 [CLK_AC_DIG] = &ac_dig_clk.common.hw,
754 [CLK_AVS] = &avs_clk.common.hw,
755 [CLK_HDMI] = &hdmi_clk.common.hw,
756 [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw,
757 [CLK_MBUS] = &mbus_clk.common.hw,
758 [CLK_GPU] = &gpu_clk.common.hw,
765 [CLK_PLL_CPUX] = &pll_cpux_clk.common.hw,
766 [CLK_PLL_AUDIO_BASE] = &pll_audio_base_clk.common.hw,
771 [CLK_PLL_VIDEO] = &pll_video_clk.common.hw,
772 [CLK_PLL_VE] = &pll_ve_clk.common.hw,
773 [CLK_PLL_DDR] = &pll_ddr_clk.common.hw,
774 [CLK_PLL_PERIPH0] = &pll_periph0_clk.common.hw,
776 [CLK_PLL_GPU] = &pll_gpu_clk.common.hw,
777 [CLK_PLL_PERIPH1] = &pll_periph1_clk.common.hw,
778 [CLK_PLL_DE] = &pll_de_clk.common.hw,
779 [CLK_CPUX] = &cpux_clk.common.hw,
780 [CLK_AXI] = &axi_clk.common.hw,
781 [CLK_AHB1] = &ahb1_clk.common.hw,
782 [CLK_APB1] = &apb1_clk.common.hw,
783 [CLK_APB2] = &apb2_clk.common.hw,
784 [CLK_AHB2] = &ahb2_clk.common.hw,
785 [CLK_BUS_CE] = &bus_ce_clk.common.hw,
786 [CLK_BUS_DMA] = &bus_dma_clk.common.hw,
787 [CLK_BUS_MMC0] = &bus_mmc0_clk.common.hw,
788 [CLK_BUS_MMC1] = &bus_mmc1_clk.common.hw,
789 [CLK_BUS_MMC2] = &bus_mmc2_clk.common.hw,
790 [CLK_BUS_NAND] = &bus_nand_clk.common.hw,
791 [CLK_BUS_DRAM] = &bus_dram_clk.common.hw,
792 [CLK_BUS_EMAC] = &bus_emac_clk.common.hw,
793 [CLK_BUS_TS] = &bus_ts_clk.common.hw,
794 [CLK_BUS_HSTIMER] = &bus_hstimer_clk.common.hw,
795 [CLK_BUS_SPI0] = &bus_spi0_clk.common.hw,
796 [CLK_BUS_SPI1] = &bus_spi1_clk.common.hw,
797 [CLK_BUS_OTG] = &bus_otg_clk.common.hw,
798 [CLK_BUS_EHCI0] = &bus_ehci0_clk.common.hw,
799 [CLK_BUS_EHCI1] = &bus_ehci1_clk.common.hw,
800 [CLK_BUS_EHCI2] = &bus_ehci2_clk.common.hw,
801 [CLK_BUS_EHCI3] = &bus_ehci3_clk.common.hw,
802 [CLK_BUS_OHCI0] = &bus_ohci0_clk.common.hw,
803 [CLK_BUS_OHCI1] = &bus_ohci1_clk.common.hw,
804 [CLK_BUS_OHCI2] = &bus_ohci2_clk.common.hw,
805 [CLK_BUS_OHCI3] = &bus_ohci3_clk.common.hw,
806 [CLK_BUS_VE] = &bus_ve_clk.common.hw,
807 [CLK_BUS_TCON0] = &bus_tcon0_clk.common.hw,
808 [CLK_BUS_TCON1] = &bus_tcon1_clk.common.hw,
809 [CLK_BUS_DEINTERLACE] = &bus_deinterlace_clk.common.hw,
810 [CLK_BUS_CSI] = &bus_csi_clk.common.hw,
811 [CLK_BUS_TVE] = &bus_tve_clk.common.hw,
812 [CLK_BUS_HDMI] = &bus_hdmi_clk.common.hw,
813 [CLK_BUS_DE] = &bus_de_clk.common.hw,
814 [CLK_BUS_GPU] = &bus_gpu_clk.common.hw,
815 [CLK_BUS_MSGBOX] = &bus_msgbox_clk.common.hw,
816 [CLK_BUS_SPINLOCK] = &bus_spinlock_clk.common.hw,
817 [CLK_BUS_CODEC] = &bus_codec_clk.common.hw,
818 [CLK_BUS_SPDIF] = &bus_spdif_clk.common.hw,
819 [CLK_BUS_PIO] = &bus_pio_clk.common.hw,
820 [CLK_BUS_THS] = &bus_ths_clk.common.hw,
821 [CLK_BUS_I2S0] = &bus_i2s0_clk.common.hw,
822 [CLK_BUS_I2S1] = &bus_i2s1_clk.common.hw,
823 [CLK_BUS_I2S2] = &bus_i2s2_clk.common.hw,
824 [CLK_BUS_I2C0] = &bus_i2c0_clk.common.hw,
825 [CLK_BUS_I2C1] = &bus_i2c1_clk.common.hw,
826 [CLK_BUS_I2C2] = &bus_i2c2_clk.common.hw,
827 [CLK_BUS_UART0] = &bus_uart0_clk.common.hw,
828 [CLK_BUS_UART1] = &bus_uart1_clk.common.hw,
829 [CLK_BUS_UART2] = &bus_uart2_clk.common.hw,
830 [CLK_BUS_UART3] = &bus_uart3_clk.common.hw,
831 [CLK_BUS_SCR0] = &bus_scr0_clk.common.hw,
832 [CLK_BUS_SCR1] = &bus_scr1_clk.common.hw,
833 [CLK_BUS_EPHY] = &bus_ephy_clk.common.hw,
834 [CLK_BUS_DBG] = &bus_dbg_clk.common.hw,
835 [CLK_THS] = &ths_clk.common.hw,
836 [CLK_NAND] = &nand_clk.common.hw,
837 [CLK_MMC0] = &mmc0_clk.common.hw,
838 [CLK_MMC1] = &mmc1_clk.common.hw,
839 [CLK_MMC2] = &mmc2_clk.common.hw,
840 [CLK_TS] = &ts_clk.common.hw,
841 [CLK_CE] = &ce_clk.common.hw,
842 [CLK_SPI0] = &spi0_clk.common.hw,
843 [CLK_SPI1] = &spi1_clk.common.hw,
844 [CLK_I2S0] = &i2s0_clk.common.hw,
845 [CLK_I2S1] = &i2s1_clk.common.hw,
846 [CLK_I2S2] = &i2s2_clk.common.hw,
847 [CLK_SPDIF] = &spdif_clk.common.hw,
848 [CLK_USB_PHY0] = &usb_phy0_clk.common.hw,
849 [CLK_USB_PHY1] = &usb_phy1_clk.common.hw,
850 [CLK_USB_PHY2] = &usb_phy2_clk.common.hw,
851 [CLK_USB_PHY3] = &usb_phy3_clk.common.hw,
852 [CLK_USB_OHCI0] = &usb_ohci0_clk.common.hw,
853 [CLK_USB_OHCI1] = &usb_ohci1_clk.common.hw,
854 [CLK_USB_OHCI2] = &usb_ohci2_clk.common.hw,
855 [CLK_USB_OHCI3] = &usb_ohci3_clk.common.hw,
856 [CLK_DRAM] = &h5_dram_clk.common.hw,
857 [CLK_DRAM_VE] = &dram_ve_clk.common.hw,
858 [CLK_DRAM_CSI] = &dram_csi_clk.common.hw,
859 [CLK_DRAM_DEINTERLACE] = &dram_deinterlace_clk.common.hw,
860 [CLK_DRAM_TS] = &dram_ts_clk.common.hw,
861 [CLK_DE] = &de_clk.common.hw,
862 [CLK_TCON0] = &tcon_clk.common.hw,
863 [CLK_TVE] = &tve_clk.common.hw,
864 [CLK_DEINTERLACE] = &deinterlace_clk.common.hw,
865 [CLK_CSI_MISC] = &csi_misc_clk.common.hw,
866 [CLK_CSI_SCLK] = &csi_sclk_clk.common.hw,
867 [CLK_CSI_MCLK] = &csi_mclk_clk.common.hw,
868 [CLK_VE] = &ve_clk.common.hw,
869 [CLK_AC_DIG] = &ac_dig_clk.common.hw,
870 [CLK_AVS] = &avs_clk.common.hw,
871 [CLK_HDMI] = &hdmi_clk.common.hw,
872 [CLK_HDMI_DDC] = &hdmi_ddc_clk.common.hw,
873 [CLK_MBUS] = &mbus_clk.common.hw,
874 [CLK_GPU] = &gpu_clk.common.hw,
1027 .common = &pll_cpux_clk.common,
1034 .common = &cpux_clk.common,
1068 ccu_mux_notifier_register(pll_cpux_clk.common.hw.clk,