Lines Matching refs:NULL
386 clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, 0, 32000);
387 clk_register_clkdev(clk, "osc_32k_clk", NULL);
389 clk = clk_register_fixed_rate(NULL, "osc_24m_clk", NULL, 0, 24000000);
390 clk_register_clkdev(clk, "osc_24m_clk", NULL);
392 clk = clk_register_fixed_rate(NULL, "osc_25m_clk", NULL, 0, 25000000);
393 clk_register_clkdev(clk, "osc_25m_clk", NULL);
395 clk = clk_register_fixed_rate(NULL, "gmii_pad_clk", NULL, 0, 125000000);
396 clk_register_clkdev(clk, "gmii_pad_clk", NULL);
398 clk = clk_register_fixed_rate(NULL, "i2s_src_pad_clk", NULL, 0,
400 clk_register_clkdev(clk, "i2s_src_pad_clk", NULL);
403 clk = clk_register_gate(NULL, "rtc-spear", "osc_32k_clk", 0,
406 clk_register_clkdev(clk, NULL, "e0580000.rtc");
410 clk = clk_register_mux(NULL, "vco1_mclk", vco_parents,
414 clk_register_clkdev(clk, "vco1_mclk", NULL);
415 clk = clk_register_vco_pll("vco1_clk", "pll1_clk", NULL, "vco1_mclk",
417 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
418 clk_register_clkdev(clk, "vco1_clk", NULL);
419 clk_register_clkdev(clk1, "pll1_clk", NULL);
421 clk = clk_register_mux(NULL, "vco2_mclk", vco_parents,
425 clk_register_clkdev(clk, "vco2_mclk", NULL);
426 clk = clk_register_vco_pll("vco2_clk", "pll2_clk", NULL, "vco2_mclk",
428 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
429 clk_register_clkdev(clk, "vco2_clk", NULL);
430 clk_register_clkdev(clk1, "pll2_clk", NULL);
432 clk = clk_register_mux(NULL, "vco3_mclk", vco_parents,
436 clk_register_clkdev(clk, "vco3_mclk", NULL);
437 clk = clk_register_vco_pll("vco3_clk", "pll3_clk", NULL, "vco3_mclk",
439 ARRAY_SIZE(pll_rtbl), &_lock, &clk1, NULL);
440 clk_register_clkdev(clk, "vco3_clk", NULL);
441 clk_register_clkdev(clk1, "pll3_clk", NULL);
443 clk = clk_register_vco_pll("vco4_clk", "pll4_clk", NULL, "osc_24m_clk",
445 ARRAY_SIZE(pll4_rtbl), &_lock, &clk1, NULL);
446 clk_register_clkdev(clk, "vco4_clk", NULL);
447 clk_register_clkdev(clk1, "pll4_clk", NULL);
449 clk = clk_register_fixed_rate(NULL, "pll5_clk", "osc_24m_clk", 0,
451 clk_register_clkdev(clk, "pll5_clk", NULL);
453 clk = clk_register_fixed_rate(NULL, "pll6_clk", "osc_25m_clk", 0,
455 clk_register_clkdev(clk, "pll6_clk", NULL);
458 clk = clk_register_fixed_factor(NULL, "vco1div2_clk", "vco1_clk", 0, 1,
460 clk_register_clkdev(clk, "vco1div2_clk", NULL);
462 clk = clk_register_fixed_factor(NULL, "vco1div4_clk", "vco1_clk", 0, 1,
464 clk_register_clkdev(clk, "vco1div4_clk", NULL);
466 clk = clk_register_fixed_factor(NULL, "vco2div2_clk", "vco2_clk", 0, 1,
468 clk_register_clkdev(clk, "vco2div2_clk", NULL);
470 clk = clk_register_fixed_factor(NULL, "vco3div2_clk", "vco3_clk", 0, 1,
472 clk_register_clkdev(clk, "vco3div2_clk", NULL);
475 clk_register_fixed_factor(NULL, "thermal_clk", "osc_24m_clk", 0, 1,
477 clk = clk_register_gate(NULL, "thermal_gclk", "thermal_clk", 0,
480 clk_register_clkdev(clk, NULL, "spear_thermal");
483 clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1,
485 clk_register_clkdev(clk, "ddr_clk", NULL);
488 clk = clk_register_fixed_factor(NULL, "cpu_clk", "pll1_clk",
490 clk_register_clkdev(clk, "cpu_clk", NULL);
492 clk = clk_register_fixed_factor(NULL, "wdt_clk", "cpu_clk", 0, 1,
494 clk_register_clkdev(clk, NULL, "ec800620.wdt");
496 clk = clk_register_fixed_factor(NULL, "smp_twd_clk", "cpu_clk", 0, 1,
498 clk_register_clkdev(clk, NULL, "smp_twd");
500 clk = clk_register_fixed_factor(NULL, "ahb_clk", "pll1_clk", 0, 1,
502 clk_register_clkdev(clk, "ahb_clk", NULL);
504 clk = clk_register_fixed_factor(NULL, "apb_clk", "pll1_clk", 0, 1,
506 clk_register_clkdev(clk, "apb_clk", NULL);
509 clk = clk_register_mux(NULL, "gpt0_mclk", gpt_parents,
513 clk_register_clkdev(clk, "gpt0_mclk", NULL);
514 clk = clk_register_gate(NULL, "gpt0_clk", "gpt0_mclk", 0,
517 clk_register_clkdev(clk, NULL, "gpt0");
519 clk = clk_register_mux(NULL, "gpt1_mclk", gpt_parents,
523 clk_register_clkdev(clk, "gpt1_mclk", NULL);
524 clk = clk_register_gate(NULL, "gpt1_clk", "gpt1_mclk", 0,
527 clk_register_clkdev(clk, NULL, "gpt1");
529 clk = clk_register_mux(NULL, "gpt2_mclk", gpt_parents,
533 clk_register_clkdev(clk, "gpt2_mclk", NULL);
534 clk = clk_register_gate(NULL, "gpt2_clk", "gpt2_mclk", 0,
537 clk_register_clkdev(clk, NULL, "gpt2");
539 clk = clk_register_mux(NULL, "gpt3_mclk", gpt_parents,
543 clk_register_clkdev(clk, "gpt3_mclk", NULL);
544 clk = clk_register_gate(NULL, "gpt3_clk", "gpt3_mclk", 0,
547 clk_register_clkdev(clk, NULL, "gpt3");
551 0, SPEAR1310_UART_CLK_SYNT, NULL, aux_rtbl,
553 clk_register_clkdev(clk, "uart_syn_clk", NULL);
554 clk_register_clkdev(clk1, "uart_syn_gclk", NULL);
556 clk = clk_register_mux(NULL, "uart0_mclk", uart0_parents,
561 clk_register_clkdev(clk, "uart0_mclk", NULL);
563 clk = clk_register_gate(NULL, "uart0_clk", "uart0_mclk",
566 clk_register_clkdev(clk, NULL, "e0000000.serial");
569 "vco1div2_clk", 0, SPEAR1310_SDHCI_CLK_SYNT, NULL,
571 clk_register_clkdev(clk, "sdhci_syn_clk", NULL);
572 clk_register_clkdev(clk1, "sdhci_syn_gclk", NULL);
574 clk = clk_register_gate(NULL, "sdhci_clk", "sdhci_syn_gclk",
577 clk_register_clkdev(clk, NULL, "b3000000.sdhci");
580 0, SPEAR1310_CFXD_CLK_SYNT, NULL, aux_rtbl,
582 clk_register_clkdev(clk, "cfxd_syn_clk", NULL);
583 clk_register_clkdev(clk1, "cfxd_syn_gclk", NULL);
585 clk = clk_register_gate(NULL, "cfxd_clk", "cfxd_syn_gclk",
588 clk_register_clkdev(clk, NULL, "b2800000.cf");
589 clk_register_clkdev(clk, NULL, "arasan_xd");
592 0, SPEAR1310_C3_CLK_SYNT, NULL, aux_rtbl,
594 clk_register_clkdev(clk, "c3_syn_clk", NULL);
595 clk_register_clkdev(clk1, "c3_syn_gclk", NULL);
597 clk = clk_register_mux(NULL, "c3_mclk", c3_parents,
602 clk_register_clkdev(clk, "c3_mclk", NULL);
604 clk = clk_register_gate(NULL, "c3_clk", "c3_mclk", 0,
607 clk_register_clkdev(clk, NULL, "c3");
610 clk = clk_register_mux(NULL, "phy_input_mclk", gmac_phy_input_parents,
615 clk_register_clkdev(clk, "phy_input_mclk", NULL);
618 0, SPEAR1310_GMAC_CLK_SYNT, NULL, gmac_rtbl,
620 clk_register_clkdev(clk, "phy_syn_clk", NULL);
621 clk_register_clkdev(clk1, "phy_syn_gclk", NULL);
623 clk = clk_register_mux(NULL, "phy_mclk", gmac_phy_parents,
627 clk_register_clkdev(clk, "stmmacphy.0", NULL);
630 clk = clk_register_mux(NULL, "clcd_syn_mclk", clcd_synth_parents,
635 clk_register_clkdev(clk, "clcd_syn_mclk", NULL);
640 clk_register_clkdev(clk, "clcd_syn_clk", NULL);
642 clk = clk_register_mux(NULL, "clcd_pixel_mclk", clcd_pixel_parents,
647 clk_register_clkdev(clk, "clcd_pixel_mclk", NULL);
649 clk = clk_register_gate(NULL, "clcd_clk", "clcd_pixel_mclk", 0,
652 clk_register_clkdev(clk, NULL, "e1000000.clcd");
655 clk = clk_register_mux(NULL, "i2s_src_mclk", i2s_src_parents,
659 clk_register_clkdev(clk, "i2s_src_mclk", NULL);
661 clk = clk_register_aux("i2s_prs1_clk", NULL, "i2s_src_mclk", 0,
663 ARRAY_SIZE(i2s_prs1_rtbl), &_lock, NULL);
664 clk_register_clkdev(clk, "i2s_prs1_clk", NULL);
666 clk = clk_register_mux(NULL, "i2s_ref_mclk", i2s_ref_parents,
671 clk_register_clkdev(clk, "i2s_ref_mclk", NULL);
673 clk = clk_register_gate(NULL, "i2s_ref_pad_clk", "i2s_ref_mclk", 0,
676 clk_register_clkdev(clk, "i2s_ref_pad_clk", NULL);
682 clk_register_clkdev(clk, "i2s_sclk_clk", NULL);
683 clk_register_clkdev(clk1, "i2s_sclk_gclk", NULL);
686 clk = clk_register_gate(NULL, "i2c0_clk", "ahb_clk", 0,
689 clk_register_clkdev(clk, NULL, "e0280000.i2c");
691 clk = clk_register_gate(NULL, "dma_clk", "ahb_clk", 0,
694 clk_register_clkdev(clk, NULL, "ea800000.dma");
695 clk_register_clkdev(clk, NULL, "eb000000.dma");
697 clk = clk_register_gate(NULL, "jpeg_clk", "ahb_clk", 0,
700 clk_register_clkdev(clk, NULL, "b2000000.jpeg");
702 clk = clk_register_gate(NULL, "gmac_clk", "ahb_clk", 0,
705 clk_register_clkdev(clk, NULL, "e2000000.eth");
707 clk = clk_register_gate(NULL, "fsmc_clk", "ahb_clk", 0,
710 clk_register_clkdev(clk, NULL, "b0000000.flash");
712 clk = clk_register_gate(NULL, "smi_clk", "ahb_clk", 0,
715 clk_register_clkdev(clk, NULL, "ea000000.flash");
717 clk = clk_register_gate(NULL, "usbh0_clk", "ahb_clk", 0,
720 clk_register_clkdev(clk, NULL, "e4000000.ohci");
721 clk_register_clkdev(clk, NULL, "e4800000.ehci");
723 clk = clk_register_gate(NULL, "usbh1_clk", "ahb_clk", 0,
726 clk_register_clkdev(clk, NULL, "e5000000.ohci");
727 clk_register_clkdev(clk, NULL, "e5800000.ehci");
729 clk = clk_register_gate(NULL, "uoc_clk", "ahb_clk", 0,
732 clk_register_clkdev(clk, NULL, "e3800000.otg");
734 clk = clk_register_gate(NULL, "pcie_sata_0_clk", "ahb_clk", 0,
737 clk_register_clkdev(clk, NULL, "b1000000.pcie");
738 clk_register_clkdev(clk, NULL, "b1000000.ahci");
740 clk = clk_register_gate(NULL, "pcie_sata_1_clk", "ahb_clk", 0,
743 clk_register_clkdev(clk, NULL, "b1800000.pcie");
744 clk_register_clkdev(clk, NULL, "b1800000.ahci");
746 clk = clk_register_gate(NULL, "pcie_sata_2_clk", "ahb_clk", 0,
749 clk_register_clkdev(clk, NULL, "b4000000.pcie");
750 clk_register_clkdev(clk, NULL, "b4000000.ahci");
752 clk = clk_register_gate(NULL, "sysram0_clk", "ahb_clk", 0,
755 clk_register_clkdev(clk, "sysram0_clk", NULL);
757 clk = clk_register_gate(NULL, "sysram1_clk", "ahb_clk", 0,
760 clk_register_clkdev(clk, "sysram1_clk", NULL);
763 0, SPEAR1310_ADC_CLK_SYNT, NULL, adc_rtbl,
765 clk_register_clkdev(clk, "adc_syn_clk", NULL);
766 clk_register_clkdev(clk1, "adc_syn_gclk", NULL);
768 clk = clk_register_gate(NULL, "adc_clk", "adc_syn_gclk",
771 clk_register_clkdev(clk, NULL, "e0080000.adc");
774 clk = clk_register_gate(NULL, "ssp0_clk", "apb_clk", 0,
777 clk_register_clkdev(clk, NULL, "e0100000.spi");
779 clk = clk_register_gate(NULL, "gpio0_clk", "apb_clk", 0,
782 clk_register_clkdev(clk, NULL, "e0600000.gpio");
784 clk = clk_register_gate(NULL, "gpio1_clk", "apb_clk", 0,
787 clk_register_clkdev(clk, NULL, "e0680000.gpio");
789 clk = clk_register_gate(NULL, "i2s0_clk", "apb_clk", 0,
792 clk_register_clkdev(clk, NULL, "e0180000.i2s");
794 clk = clk_register_gate(NULL, "i2s1_clk", "apb_clk", 0,
797 clk_register_clkdev(clk, NULL, "e0200000.i2s");
799 clk = clk_register_gate(NULL, "kbd_clk", "apb_clk", 0,
802 clk_register_clkdev(clk, NULL, "e0300000.kbd");
805 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents,
810 clk_register_clkdev(clk, "gen_syn0_1_clk", NULL);
812 clk = clk_register_mux(NULL, "gen_syn2_3_mclk", gen_synth2_3_parents,
817 clk_register_clkdev(clk, "gen_syn2_3_clk", NULL);
822 clk_register_clkdev(clk, "gen_syn0_clk", NULL);
827 clk_register_clkdev(clk, "gen_syn1_clk", NULL);
832 clk_register_clkdev(clk, "gen_syn2_clk", NULL);
837 clk_register_clkdev(clk, "gen_syn3_clk", NULL);
839 clk = clk_register_gate(NULL, "ras_osc_24m_clk", "osc_24m_clk", 0,
842 clk_register_clkdev(clk, "ras_osc_24m_clk", NULL);
844 clk = clk_register_gate(NULL, "ras_osc_25m_clk", "osc_25m_clk", 0,
847 clk_register_clkdev(clk, "ras_osc_25m_clk", NULL);
849 clk = clk_register_gate(NULL, "ras_osc_32k_clk", "osc_32k_clk", 0,
852 clk_register_clkdev(clk, "ras_osc_32k_clk", NULL);
854 clk = clk_register_gate(NULL, "ras_pll2_clk", "pll2_clk", 0,
857 clk_register_clkdev(clk, "ras_pll2_clk", NULL);
859 clk = clk_register_gate(NULL, "ras_pll3_clk", "pll3_clk", 0,
862 clk_register_clkdev(clk, "ras_pll3_clk", NULL);
864 clk = clk_register_gate(NULL, "ras_tx125_clk", "gmii_pad_clk", 0,
867 clk_register_clkdev(clk, "ras_tx125_clk", NULL);
869 clk = clk_register_fixed_rate(NULL, "ras_30m_fixed_clk", "pll5_clk", 0,
871 clk = clk_register_gate(NULL, "ras_30m_clk", "ras_30m_fixed_clk", 0,
874 clk_register_clkdev(clk, "ras_30m_clk", NULL);
876 clk = clk_register_fixed_rate(NULL, "ras_48m_fixed_clk", "pll5_clk", 0,
878 clk = clk_register_gate(NULL, "ras_48m_clk", "ras_48m_fixed_clk", 0,
881 clk_register_clkdev(clk, "ras_48m_clk", NULL);
883 clk = clk_register_gate(NULL, "ras_ahb_clk", "ahb_clk", 0,
886 clk_register_clkdev(clk, "ras_ahb_clk", NULL);
888 clk = clk_register_gate(NULL, "ras_apb_clk", "apb_clk", 0,
891 clk_register_clkdev(clk, "ras_apb_clk", NULL);
893 clk = clk_register_fixed_rate(NULL, "ras_plclk0_clk", NULL, 0,
896 clk = clk_register_fixed_rate(NULL, "ras_tx50_clk", NULL, 0, 50000000);
898 clk = clk_register_gate(NULL, "can0_clk", "apb_clk", 0,
901 clk_register_clkdev(clk, NULL, "c_can_platform.0");
903 clk = clk_register_gate(NULL, "can1_clk", "apb_clk", 0,
906 clk_register_clkdev(clk, NULL, "c_can_platform.1");
908 clk = clk_register_gate(NULL, "ras_smii0_clk", "ras_ahb_clk", 0,
911 clk_register_clkdev(clk, NULL, "5c400000.eth");
913 clk = clk_register_gate(NULL, "ras_smii1_clk", "ras_ahb_clk", 0,
916 clk_register_clkdev(clk, NULL, "5c500000.eth");
918 clk = clk_register_gate(NULL, "ras_smii2_clk", "ras_ahb_clk", 0,
921 clk_register_clkdev(clk, NULL, "5c600000.eth");
923 clk = clk_register_gate(NULL, "ras_rgmii_clk", "ras_ahb_clk", 0,
926 clk_register_clkdev(clk, NULL, "5c700000.eth");
928 clk = clk_register_mux(NULL, "smii_rgmii_phy_mclk",
934 clk_register_clkdev(clk, "stmmacphy.1", NULL);
935 clk_register_clkdev(clk, "stmmacphy.2", NULL);
936 clk_register_clkdev(clk, "stmmacphy.4", NULL);
938 clk = clk_register_mux(NULL, "rmii_phy_mclk", rmii_phy_parents,
942 clk_register_clkdev(clk, "stmmacphy.3", NULL);
944 clk = clk_register_mux(NULL, "uart1_mclk", uart_parents,
948 clk_register_clkdev(clk, "uart1_mclk", NULL);
950 clk = clk_register_gate(NULL, "uart1_clk", "uart1_mclk", 0,
953 clk_register_clkdev(clk, NULL, "5c800000.serial");
955 clk = clk_register_mux(NULL, "uart2_mclk", uart_parents,
959 clk_register_clkdev(clk, "uart2_mclk", NULL);
961 clk = clk_register_gate(NULL, "uart2_clk", "uart2_mclk", 0,
964 clk_register_clkdev(clk, NULL, "5c900000.serial");
966 clk = clk_register_mux(NULL, "uart3_mclk", uart_parents,
970 clk_register_clkdev(clk, "uart3_mclk", NULL);
972 clk = clk_register_gate(NULL, "uart3_clk", "uart3_mclk", 0,
975 clk_register_clkdev(clk, NULL, "5ca00000.serial");
977 clk = clk_register_mux(NULL, "uart4_mclk", uart_parents,
981 clk_register_clkdev(clk, "uart4_mclk", NULL);
983 clk = clk_register_gate(NULL, "uart4_clk", "uart4_mclk", 0,
986 clk_register_clkdev(clk, NULL, "5cb00000.serial");
988 clk = clk_register_mux(NULL, "uart5_mclk", uart_parents,
992 clk_register_clkdev(clk, "uart5_mclk", NULL);
994 clk = clk_register_gate(NULL, "uart5_clk", "uart5_mclk", 0,
997 clk_register_clkdev(clk, NULL, "5cc00000.serial");
999 clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents,
1003 clk_register_clkdev(clk, "i2c1_mclk", NULL);
1005 clk = clk_register_gate(NULL, "i2c1_clk", "i2c1_mclk", 0,
1008 clk_register_clkdev(clk, NULL, "5cd00000.i2c");
1010 clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents,
1014 clk_register_clkdev(clk, "i2c2_mclk", NULL);
1016 clk = clk_register_gate(NULL, "i2c2_clk", "i2c2_mclk", 0,
1019 clk_register_clkdev(clk, NULL, "5ce00000.i2c");
1021 clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents,
1025 clk_register_clkdev(clk, "i2c3_mclk", NULL);
1027 clk = clk_register_gate(NULL, "i2c3_clk", "i2c3_mclk", 0,
1030 clk_register_clkdev(clk, NULL, "5cf00000.i2c");
1032 clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents,
1036 clk_register_clkdev(clk, "i2c4_mclk", NULL);
1038 clk = clk_register_gate(NULL, "i2c4_clk", "i2c4_mclk", 0,
1041 clk_register_clkdev(clk, NULL, "5d000000.i2c");
1043 clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents,
1047 clk_register_clkdev(clk, "i2c5_mclk", NULL);
1049 clk = clk_register_gate(NULL, "i2c5_clk", "i2c5_mclk", 0,
1052 clk_register_clkdev(clk, NULL, "5d100000.i2c");
1054 clk = clk_register_mux(NULL, "i2c6_mclk", i2c_parents,
1058 clk_register_clkdev(clk, "i2c6_mclk", NULL);
1060 clk = clk_register_gate(NULL, "i2c6_clk", "i2c6_mclk", 0,
1063 clk_register_clkdev(clk, NULL, "5d200000.i2c");
1065 clk = clk_register_mux(NULL, "i2c7_mclk", i2c_parents,
1069 clk_register_clkdev(clk, "i2c7_mclk", NULL);
1071 clk = clk_register_gate(NULL, "i2c7_clk", "i2c7_mclk", 0,
1074 clk_register_clkdev(clk, NULL, "5d300000.i2c");
1076 clk = clk_register_mux(NULL, "ssp1_mclk", ssp1_parents,
1080 clk_register_clkdev(clk, "ssp1_mclk", NULL);
1082 clk = clk_register_gate(NULL, "ssp1_clk", "ssp1_mclk", 0,
1085 clk_register_clkdev(clk, NULL, "5d400000.spi");
1087 clk = clk_register_mux(NULL, "pci_mclk", pci_parents,
1091 clk_register_clkdev(clk, "pci_mclk", NULL);
1093 clk = clk_register_gate(NULL, "pci_clk", "pci_mclk", 0,
1096 clk_register_clkdev(clk, NULL, "pci");
1098 clk = clk_register_mux(NULL, "tdm1_mclk", tdm_parents,
1102 clk_register_clkdev(clk, "tdm1_mclk", NULL);
1104 clk = clk_register_gate(NULL, "tdm1_clk", "tdm1_mclk", 0,
1107 clk_register_clkdev(clk, NULL, "tdm_hdlc.0");
1109 clk = clk_register_mux(NULL, "tdm2_mclk", tdm_parents,
1113 clk_register_clkdev(clk, "tdm2_mclk", NULL);
1115 clk = clk_register_gate(NULL, "tdm2_clk", "tdm2_mclk", 0,
1118 clk_register_clkdev(clk, NULL, "tdm_hdlc.1");