Lines Matching refs:clk_sel
682 if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
705 if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
721 s8 clk_sel;
726 if (cv1800_clk_checkbit(&mmux->common, &mmux->clk_sel))
727 clk_sel = 0;
729 clk_sel = 1;
730 mux = &mmux->mux[clk_sel];
734 return mmux->sel2parent[clk_sel][cv1800_clk_regfield_get(reg, mux)];
743 s8 clk_sel = mmux->parent2sel[index];
745 if (index == 0 || clk_sel == -1) {
752 if (clk_sel)
753 cv1800_clk_clearbit(&mmux->common, &mmux->clk_sel);
755 cv1800_clk_setbit(&mmux->common, &mmux->clk_sel);
759 mux = &mmux->mux[clk_sel];