clk/sifive/sifive-prci.c

119  * @pwd: PRCI WRPLL metadata
121  * Read the current configuration of the PLL identified by @pwd from
123  * cache in @pwd.
126  *          @pd and @pwd from changing during execution.
129 				   struct __prci_wrpll_data *pwd)
131 	__prci_wrpll_unpack(&pwd->c, __prci_readl(pd, pwd->cfg0_offs));
137  * @pwd: PRCI WRPLL metadata
141  * configuration register identified by @pwd in the PRCI instance
146  *          @pd and @pwd from changing during execution.
149 				    struct __prci_wrpll_data *pwd,
152 	__prci_writel(__prci_wrpll_pack(c), pwd->cfg0_offs, pd);
154 	memcpy(&pwd->c, c, sizeof(*c));
161  * @pwd: PRCI WRPLL metadata
165 				    struct __prci_wrpll_data *pwd,
168 	__prci_writel(enable, pwd->cfg1_offs, pd);
182 	struct __prci_wrpll_data *pwd = pc->pwd;
184 	return wrpll_calc_output_rate(&pwd->c, parent_rate);
192 	struct __prci_wrpll_data *pwd = pc->pwd;
195 	memcpy(&c, &pwd->c, sizeof(c));
206 	struct __prci_wrpll_data *pwd = pc->pwd;
210 	r = wrpll_configure_for_rate(&pwd->c, rate, parent_rate);
214 	if (pwd->enable_bypass)
215 		pwd->enable_bypass(pd);
217 	__prci_wrpll_write_cfg0(pd, pwd, &pwd->c);
219 	udelay(wrpll_calc_max_lock_us(&pwd->c));
227 	struct __prci_wrpll_data *pwd = pc->pwd;
231 	r = __prci_readl(pd, pwd->cfg1_offs);
242 	struct __prci_wrpll_data *pwd = pc->pwd;
248 	__prci_wrpll_write_cfg1(pd, pwd, PRCI_COREPLLCFG1_CKE_MASK);
250 	if (pwd->disable_bypass)
251 		pwd->disable_bypass(pd);
259 	struct __prci_wrpll_data *pwd = pc->pwd;
263 	if (pwd->enable_bypass)
264 		pwd->enable_bypass(pd);
266 	r = __prci_readl(pd, pwd->cfg1_offs);
269 	__prci_wrpll_write_cfg1(pd, pwd, r);
530 		if (pic->pwd)
531 			__prci_wrpll_read_cfg0(pd, pic->pwd);