clk/samsung/clk-pll.c

153 	u32 pll_con, mdiv, pdiv, sdiv;
157 	mdiv = (pll_con >> PLL2126_MDIV_SHIFT) & PLL2126_MDIV_MASK;
161 	fvco *= (mdiv + 8);
186 	u32 pll_con, mdiv, pdiv, sdiv;
190 	mdiv = (pll_con >> PLL3000_MDIV_SHIFT) & PLL3000_MDIV_MASK;
194 	fvco *= (2 * (mdiv + 8));
223 	u32 mdiv, pdiv, sdiv, pll_con;
227 	mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK;
231 	fvco *= mdiv;
245 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv);
282 	tmp |= (rate->mdiv << PLL35XX_MDIV_SHIFT) |
327 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
333 	mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;
338 	fvco *= (mdiv << 16) + kdiv;
354 	return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv ||
391 	pll_con0 |= (rate->mdiv << PLL36XX_MDIV_SHIFT) |
437 	u32 mdiv, pdiv, sdiv, pll_con3;
441 	mdiv = (pll_con3 >> PLL0822X_MDIV_SHIFT) & PLL0822X_MDIV_MASK;
445 	fvco *= mdiv;
474 	pll_con3 |= (rate->mdiv << PLL0822X_MDIV_SHIFT) |
525 	u32 mdiv, pdiv, sdiv, pll_con3, pll_con5;
531 	mdiv = (pll_con3 >> PLL0831X_MDIV_SHIFT) & PLL0831X_MDIV_MASK;
536 	fvco *= (mdiv << 16) + kdiv;
565 	pll_con3 |= (rate->mdiv << PLL0831X_MDIV_SHIFT) |
623 	u32 mdiv, pdiv, sdiv, pll_con;
627 	mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
634 	fvco *= mdiv;
649 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
684 	con0 |= (rate->mdiv << PLL45XX_MDIV_SHIFT) |
756 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1, shift;
761 	mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & ((pll->type == pll_1460x) ?
770 	fvco *= (mdiv << shift) + kdiv;
786 	return (old_mdiv != rate->mdiv || old_pdiv != rate->pdiv
836 	con0 |= (rate->mdiv << PLL46XX_MDIV_SHIFT) |
885 	u32 mdiv, pdiv, sdiv, pll_con;
890 		mdiv = (pll_con >> PLL6552_MDIV_SHIFT_2416) & PLL6552_MDIV_MASK;
893 		mdiv = (pll_con >> PLL6552_MDIV_SHIFT) & PLL6552_MDIV_MASK;
898 	fvco *= mdiv;
925 	u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
930 	mdiv = (pll_con0 >> PLL6553_MDIV_SHIFT) & PLL6553_MDIV_MASK;
935 	fvco *= (mdiv << 16) + kdiv;
1004 	u32 mdiv, pdiv, sdiv, pll_con;
1008 	mdiv = (pll_con >> PLL2550XX_M_SHIFT) & PLL2550XX_M_MASK;
1012 	fvco *= mdiv;
1018 static inline bool samsung_pll2550xx_mp_change(u32 mdiv, u32 pdiv, u32 pll_con)
1025 	return mdiv != old_mdiv || pdiv != old_pdiv;
1045 	if (!(samsung_pll2550xx_mp_change(rate->mdiv, rate->pdiv, tmp))) {
1061 	tmp |= (rate->mdiv << PLL2550XX_M_SHIFT) |
1105 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con1;
1109 	mdiv = (pll_con0 >> PLL2650X_M_SHIFT) & PLL2650X_M_MASK;
1116 	fout *= (mdiv << 16) + kdiv;
1148 	con0 |= (rate->mdiv << PLL2650X_M_SHIFT) |
1196 	u32 mdiv, pdiv, sdiv, pll_con0, pll_con2;
1202 	mdiv = (pll_con0 >> PLL2650XX_MDIV_SHIFT) & PLL2650XX_MDIV_MASK;
1207 	fvco *= (mdiv << 16) + kdiv;
1235 	pll_con0 |= rate->mdiv << PLL2650XX_MDIV_SHIFT;