clk/samsung/clk-cpu.c

169 	unsigned long div0;
171 	div0 = readl(base + regs->div_cpu0);
172 	div0 = (div0 & ~mask) | (div & mask);
173 	writel(div0, base + regs->div_cpu0);
203 	unsigned long div0, div1 = 0, mux_reg;
220 	div0 = cfg_data->div0;
252 		div0 |= alt_div;
261 	writel(div0, base + regs->div_cpu0);
302 		div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK);
330 	unsigned long div0, div1 = 0, mux_reg;
346 	div0 = cfg_data->div0;
365 		div0 |= alt_div;
374 	writel(div0, base + regs->div_cpu0);
526 		unsigned long div = (cfg_data->div0 >> shifts[i]) & 0xf;