clk/rockchip/clk-cpu.c

49  * @reg_data:	cpu-specific register settings
59 	const struct rockchip_cpuclk_reg_data	*reg_data;
86 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
87 	u32 clksel0 = readl_relaxed(cpuclk->reg_base + reg_data->core_reg[0]);
89 	clksel0 >>= reg_data->div_core_shift[0];
90 	clksel0 &= reg_data->div_core_mask[0];
155 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
182 		if (alt_div > reg_data->div_core_mask[0]) {
184 				__func__, alt_div, reg_data->div_core_mask[0]);
185 			alt_div = reg_data->div_core_mask[0];
198 		for (i = 0; i < reg_data->num_cores; i++) {
199 			writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask[i],
200 					     reg_data->div_core_shift[i]),
201 			       cpuclk->reg_base + reg_data->core_reg[i]);
208 	if (reg_data->mux_core_reg)
209 		writel(HIWORD_UPDATE(reg_data->mux_core_alt,
210 				     reg_data->mux_core_mask,
211 				     reg_data->mux_core_shift),
212 		       cpuclk->reg_base + reg_data->mux_core_reg);
214 		writel(HIWORD_UPDATE(reg_data->mux_core_alt,
215 				     reg_data->mux_core_mask,
216 				     reg_data->mux_core_shift),
217 		       cpuclk->reg_base + reg_data->core_reg[0]);
226 	const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data;
250 	if (reg_data->mux_core_reg)
251 		writel(HIWORD_UPDATE(reg_data->mux_core_main,
252 				     reg_data->mux_core_mask,
253 				     reg_data->mux_core_shift),
254 		       cpuclk->reg_base + reg_data->mux_core_reg);
256 		writel(HIWORD_UPDATE(reg_data->mux_core_main,
257 				     reg_data->mux_core_mask,
258 				     reg_data->mux_core_shift),
259 		       cpuclk->reg_base + reg_data->core_reg[0]);
264 	for (i = 0; i < reg_data->num_cores; i++) {
265 		writel(HIWORD_UPDATE(0, reg_data->div_core_mask[i],
266 				     reg_data->div_core_shift[i]),
267 		       cpuclk->reg_base + reg_data->core_reg[i]);
302 			const struct rockchip_cpuclk_reg_data *reg_data,
321 	init.parent_names = &parent_names[reg_data->mux_core_main];
335 	cpuclk->reg_data = reg_data;
339 	cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]);
342 		       __func__, reg_data->mux_core_alt);
354 	clk = __clk_lookup(parent_names[reg_data->mux_core_main]);
357 		       __func__, reg_data->mux_core_main,
358 		       parent_names[reg_data->mux_core_main]);