Lines Matching defs:dual
114 * @dual: substructure for dual clock gates
115 * @dual.group: UART group, 0=UART0/1/2, 1=UART3/4/5/6/7
116 * @dual.sel: select either g1/r1 or g2/r2 as clock source
117 * @dual.g1: 1st source gate (clock enable/disable)
118 * @dual.r1: 1st source reset (module reset)
119 * @dual.g2: 2nd source gate (clock enable/disable)
120 * @dual.r2: 2nd source reset (module reset)
148 } dual;
210 .dual = { \
639 .dual.sel = RB(0x34, 30),
640 .dual.group = 0,
648 .dual.sel = RB(0xec, 24),
649 .dual.group = 1,
1158 g->selector = desc->dual.sel;
1239 g->gate[0].gate = desc->dual.g1;
1240 g->gate[0].reset = desc->dual.r1;
1241 g->gate[1].gate = desc->dual.g2;
1242 g->gate[1].reset = desc->dual.r2;
1349 uart_group_sel[d->dual.group] = d->dual.sel;
1355 uart_group_sel[d->dual.group]);