Lines Matching defs:opt
30 u32 opt = (readl(sar) >> SAR_MV88F5181_TCLK_FREQ) &
32 if (opt == 0)
34 else if (opt == 1)
36 else if (opt == 2)
47 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
49 if (opt == 0)
51 else if (opt == 1 || opt == 2)
53 else if (opt == 3)
62 u32 opt = (readl(sar) >> SAR_MV88F5181_CPU_FREQ) &
64 if (opt == 0 || opt == 1) {
67 } else if (opt == 2 || opt == 3) {
100 u32 opt = (readl(sar) >> SAR_MV88F5182_TCLK_FREQ) &
102 if (opt == 1)
104 else if (opt == 2)
115 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
117 if (opt == 0)
119 else if (opt == 1 || opt == 2)
121 else if (opt == 3)
130 u32 opt = (readl(sar) >> SAR_MV88F5182_CPU_FREQ) &
132 if (opt == 0 || opt == 1) {
135 } else if (opt == 2 || opt == 3) {
174 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
176 if (opt == 1 || opt == 2)
178 else if (opt == 3)
187 u32 opt = (readl(sar) >> SAR_MV88F5281_CPU_FREQ) &
189 if (opt == 1) {
192 } else if (opt == 2 || opt == 3) {
225 u32 opt = (readl(sar) >> SAR_MV88F6183_TCLK_FREQ) &
227 if (opt == 0)
229 else if (opt == 1)
240 u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
242 if (opt == 9)
244 else if (opt == 17)
253 u32 opt = (readl(sar) >> SAR_MV88F6183_CPU_FREQ) &
255 if (opt == 9 || opt == 17) {