Lines Matching refs:val
30 u32 val;
35 val = readl(pm_domain->reg);
38 val |= pm_domain->power_on;
39 writel(val, pm_domain->reg);
42 val |= 0x100;
43 writel(val, pm_domain->reg);
47 u32 after_power_on = val;
49 val &= ~pm_domain->reset;
50 writel(val, pm_domain->reg);
52 val |= pm_domain->clock_enable;
53 writel(val, pm_domain->reg);
55 val |= pm_domain->reset;
56 writel(val, pm_domain->reg);
71 u32 val;
80 val = readl(pm_domain->reg);
81 val &= ~pm_domain->power_on;
82 val &= ~0x100;
83 writel(val, pm_domain->reg);