drivers/clk/clk-versaclock3.c

557 	const struct vc3_clk_data *clk_mux = vc3->data;
560 	regmap_read(vc3->regmap, clk_mux->offs, &val);
562 	return !!(val & clk_mux->bitmsk);
568 	const struct vc3_clk_data *clk_mux = vc3->data;
570 	return regmap_update_bits(vc3->regmap, clk_mux->offs, clk_mux->bitmsk,
571 				  index ? clk_mux->bitmsk : 0);
884 static struct vc3_hw_data clk_mux[] = {
1060 	for (i = 0; i < ARRAY_SIZE(clk_mux); i++) {
1061 		clk_mux[i].regmap = regmap;
1062 		ret = devm_clk_hw_register(dev, &clk_mux[i].hw);
1065 					     clk_mux[i].hw.init->name);
1098 				name, &clk_mux[i - 1].hw, CLK_SET_RATE_PARENT, 1, 1);