Lines Matching defs:init

1432 	struct clk_init_data init;
1533 memset(&init, 0, sizeof(init));
1534 init.name = si5351_input_names[0];
1535 init.ops = &si5351_xtal_ops;
1536 init.flags = 0;
1539 init.parent_names = &drvdata->pxtal_name;
1540 init.num_parents = 1;
1542 drvdata->xtal.init = &init;
1545 dev_err(&client->dev, "unable to register %s\n", init.name);
1551 memset(&init, 0, sizeof(init));
1552 init.name = si5351_input_names[1];
1553 init.ops = &si5351_clkin_ops;
1556 init.parent_names = &drvdata->pclkin_name;
1557 init.num_parents = 1;
1559 drvdata->clkin.init = &init;
1563 init.name);
1576 drvdata->pll[0].hw.init = &init;
1577 memset(&init, 0, sizeof(init));
1578 init.name = si5351_pll_names[0];
1579 init.ops = &si5351_pll_ops;
1580 init.flags = 0;
1581 init.parent_names = parent_names;
1582 init.num_parents = num_parents;
1585 dev_err(&client->dev, "unable to register %s\n", init.name);
1592 drvdata->pll[1].hw.init = &init;
1593 memset(&init, 0, sizeof(init));
1595 init.name = si5351_pll_names[2];
1596 init.ops = &si5351_vxco_ops;
1597 init.flags = 0;
1598 init.parent_names = NULL;
1599 init.num_parents = 0;
1601 init.name = si5351_pll_names[1];
1602 init.ops = &si5351_pll_ops;
1603 init.flags = 0;
1604 init.parent_names = parent_names;
1605 init.num_parents = num_parents;
1609 dev_err(&client->dev, "unable to register %s\n", init.name);
1635 drvdata->msynth[n].hw.init = &init;
1636 memset(&init, 0, sizeof(init));
1637 init.name = si5351_msynth_names[n];
1638 init.ops = &si5351_msynth_ops;
1639 init.flags = 0;
1641 init.flags |= CLK_SET_RATE_PARENT;
1642 init.parent_names = parent_names;
1643 init.num_parents = 2;
1648 init.name);
1663 drvdata->clkout[n].hw.init = &init;
1664 memset(&init, 0, sizeof(init));
1665 init.name = si5351_clkout_names[n];
1666 init.ops = &si5351_clkout_ops;
1667 init.flags = 0;
1669 init.flags |= CLK_SET_RATE_PARENT;
1670 init.parent_names = parent_names;
1671 init.num_parents = num_parents;
1676 init.name);