drivers/clk/clk-si5341.c

59 /* The output stages can be connected to any synth (full mux) */
137 #define SI5341_OUT_CONFIG(output)	\
138 			((output)->data->reg_output_offset[(output)->index])
139 #define SI5341_OUT_FORMAT(output)	(SI5341_OUT_CONFIG(output) + 1)
140 #define SI5341_OUT_CM(output)		(SI5341_OUT_CONFIG(output) + 2)
141 #define SI5341_OUT_MUX_SEL(output)	(SI5341_OUT_CONFIG(output) + 3)
142 #define SI5341_OUT_R_REG(output)	\
143 			((output)->data->reg_rdiv_offset[(output)->index])
152 /* Synthesizer output enable, phase bypass, power mode */
222  * The "known" settings like synth and output configuration are done later.
599 	/* Disable output */
629 	/* Enable output */
750 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
754 	err = regmap_read(output->data->regmap,
755 			SI5341_OUT_CONFIG(output), &val);
759 	/* Bit 0=PDN, 1=OE so only a value of 0x2 enables the output */
763 /* Disables and then powers down the output */
766 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
768 	regmap_update_bits(output->data->regmap,
769 			SI5341_OUT_CONFIG(output),
771 	regmap_update_bits(output->data->regmap,
772 			SI5341_OUT_CONFIG(output),
776 /* Powers up and then enables the output */
779 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
782 	err = regmap_update_bits(output->data->regmap,
783 			SI5341_OUT_CONFIG(output),
788 	return regmap_update_bits(output->data->regmap,
789 			SI5341_OUT_CONFIG(output),
796 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
802 	err = regmap_read(output->data->regmap,
803 			SI5341_OUT_CONFIG(output), &val);
811 	err = regmap_bulk_read(output->data->regmap,
812 			SI5341_OUT_R_REG(output), r, 3);
868 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
887 	err = regmap_update_bits(output->data->regmap,
888 			SI5341_OUT_CONFIG(output),
898 	return regmap_bulk_write(output->data->regmap,
899 			SI5341_OUT_R_REG(output), r, 3);
902 static int si5341_output_reparent(struct clk_si5341_output *output, u8 index)
904 	return regmap_update_bits(output->data->regmap,
905 		SI5341_OUT_MUX_SEL(output), 0x07, index);
910 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
912 	if (index >= output->data->num_synth)
915 	return si5341_output_reparent(output, index);
920 	struct clk_si5341_output *output = to_clk_si5341_output(hw);
923 	regmap_read(output->data->regmap, SI5341_OUT_MUX_SEL(output), &val);
970 				"invalid output index %u\n", idx);
1615 	if (of_property_read_string(client->dev.of_node, "clock-output-names",
1747 				"output %u registration failed\n", i);