Lines Matching defs:divq
96 unsigned long divf, divq, vco_freq, reg;
103 divq = (reg & HB_PLL_DIVQ_MASK) >> HB_PLL_DIVQ_SHIFT;
106 return vco_freq / (1 << divq);
112 u32 divq, divf;
120 for (divq = 1; divq <= 6; divq++) {
121 if ((rate * (1 << divq)) >= HB_PLL_VCO_MIN_FREQ)
125 vco_freq = rate * (1 << divq);
129 *pdivq = divq;
136 u32 divq, divf;
139 clk_pll_calc(rate, ref_freq, &divq, &divf);
141 return (ref_freq * (divf + 1)) / (1 << divq);
148 u32 divq, divf;
151 clk_pll_calc(rate, parent_rate, &divq, &divf);
161 reg |= (divf << HB_PLL_DIVF_SHIFT) | (divq << HB_PLL_DIVQ_SHIFT);
174 reg |= divq << HB_PLL_DIVQ_SHIFT;