clk/at91/clk-audio-pll.c

15  * enable - clk_enable writes nd, fracr parameters and enables PLL
17  *        clk->rate = parent->rate * ((nd + 1) + (fracr / 2^22))
62 	u8 nd;
102 			   AT91_PMC_AUDIO_PLL_ND(frac->nd));
160 					unsigned long nd, unsigned long fracr)
170 	return parent_rate * (nd + 1) + fr;
179 	fout = clk_audio_pll_fout(parent_rate, frac->nd, frac->fracr);
181 	pr_debug("A PLL: %s, fout = %lu (nd = %u, fracr = %lu)\n", __func__,
182 		 fout, frac->nd, (unsigned long)frac->fracr);
218 					   unsigned long *nd,
231 	*nd = tmp - 1;
247 	unsigned long fracr, nd;
259 					      &nd, &fracr);
263 	req->rate = clk_audio_pll_fout(req->best_parent_rate, nd, fracr);
267 	pr_debug("A PLL: %s, best_rate = %lu (nd = %lu, fracr = %lu)\n",
268 		 __func__, req->rate, nd, fracr);
368 	unsigned long fracr, nd;
377 	ret = clk_audio_pll_frac_compute_frac(rate, parent_rate, &nd, &fracr);
381 	frac->nd = nd;