drivers/bus/tegra-gmi.c

55 static int tegra_gmi_enable(struct tegra_gmi *gmi)
59 	pm_runtime_enable(gmi->dev);
60 	err = pm_runtime_resume_and_get(gmi->dev);
62 		pm_runtime_disable(gmi->dev);
66 	reset_control_assert(gmi->rst);
68 	reset_control_deassert(gmi->rst);
70 	writel(gmi->snor_timing0, gmi->base + TEGRA_GMI_TIMING0);
71 	writel(gmi->snor_timing1, gmi->base + TEGRA_GMI_TIMING1);
73 	gmi->snor_config |= TEGRA_GMI_CONFIG_GO;
74 	writel(gmi->snor_config, gmi->base + TEGRA_GMI_CONFIG);
79 static void tegra_gmi_disable(struct tegra_gmi *gmi)
84 	config = readl(gmi->base + TEGRA_GMI_CONFIG);
86 	writel(config, gmi->base + TEGRA_GMI_CONFIG);
88 	reset_control_assert(gmi->rst);
90 	pm_runtime_put_sync_suspend(gmi->dev);
91 	pm_runtime_force_suspend(gmi->dev);
94 static int tegra_gmi_parse_dt(struct tegra_gmi *gmi)
100 	child = of_get_next_available_child(gmi->dev->of_node, NULL);
102 		dev_err(gmi->dev, "no child nodes found\n");
111 	if (of_get_child_count(gmi->dev->of_node) > 1)
112 		dev_warn(gmi->dev, "only one child device is supported.");
115 		gmi->snor_config |= TEGRA_GMI_BUS_WIDTH_32BIT;
118 		gmi->snor_config |= TEGRA_GMI_MUX_MODE;
121 		gmi->snor_config |= TEGRA_GMI_RDY_BEFORE_DATA;
124 		gmi->snor_config |= TEGRA_GMI_RDY_ACTIVE_HIGH;
127 		gmi->snor_config |= TEGRA_GMI_ADV_ACTIVE_HIGH;
130 		gmi->snor_config |= TEGRA_GMI_OE_ACTIVE_HIGH;
133 		gmi->snor_config |= TEGRA_GMI_CS_ACTIVE_HIGH;
140 			dev_err(gmi->dev,
152 			dev_err(gmi->dev,
162 		dev_err(gmi->dev, "invalid chip select: %d", property);
167 	gmi->snor_config |= TEGRA_GMI_CS_SELECT(property);
171 		gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(property);
173 		gmi->snor_timing0 |= TEGRA_GMI_MUXED_WIDTH(1);
176 		gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(property);
178 		gmi->snor_timing0 |= TEGRA_GMI_HOLD_WIDTH(1);
181 		gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(property);
183 		gmi->snor_timing0 |= TEGRA_GMI_ADV_WIDTH(1);
186 		gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(property);
188 		gmi->snor_timing0 |= TEGRA_GMI_CE_WIDTH(4);
191 		gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(property);
193 		gmi->snor_timing1 |= TEGRA_GMI_WE_WIDTH(1);
196 		gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(property);
198 		gmi->snor_timing1 |= TEGRA_GMI_OE_WIDTH(1);
201 		gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(property);
203 		gmi->snor_timing1 |= TEGRA_GMI_WAIT_WIDTH(3);
213 	struct tegra_gmi *gmi;
216 	gmi = devm_kzalloc(dev, sizeof(*gmi), GFP_KERNEL);
217 	if (!gmi)
220 	platform_set_drvdata(pdev, gmi);
221 	gmi->dev = dev;
223 	gmi->base = devm_platform_ioremap_resource(pdev, 0);
224 	if (IS_ERR(gmi->base))
225 		return PTR_ERR(gmi->base);
227 	gmi->clk = devm_clk_get(dev, "gmi");
228 	if (IS_ERR(gmi->clk)) {
230 		return PTR_ERR(gmi->clk);
233 	gmi->rst = devm_reset_control_get(dev, "gmi");
234 	if (IS_ERR(gmi->rst)) {
236 		return PTR_ERR(gmi->rst);
243 	err = tegra_gmi_parse_dt(gmi);
247 	err = tegra_gmi_enable(gmi);
254 		tegra_gmi_disable(gmi);
263 	struct tegra_gmi *gmi = platform_get_drvdata(pdev);
265 	of_platform_depopulate(gmi->dev);
266 	tegra_gmi_disable(gmi);
271 	struct tegra_gmi *gmi = dev_get_drvdata(dev);
274 	err = clk_prepare_enable(gmi->clk);
276 		dev_err(gmi->dev, "failed to enable clock: %d\n", err);
285 	struct tegra_gmi *gmi = dev_get_drvdata(dev);
287 	clk_disable_unprepare(gmi->clk);
298 	{ .compatible = "nvidia,tegra20-gmi", },
299 	{ .compatible = "nvidia,tegra30-gmi", },
308 		.name		= "tegra-gmi",