Lines Matching defs:eb

93 		.prop = "intel,ixp4xx-eb-t1",
99 .prop = "intel,ixp4xx-eb-t2",
105 .prop = "intel,ixp4xx-eb-t3",
111 .prop = "intel,ixp4xx-eb-t4",
117 .prop = "intel,ixp4xx-eb-t5",
123 .prop = "intel,ixp4xx-eb-byte-access-on-halfword",
128 .prop = "intel,ixp4xx-eb-hpi-hrdy-pol-high",
133 .prop = "intel,ixp4xx-eb-mux-address-and-data",
138 .prop = "intel,ixp4xx-eb-ahb-split-transfers",
143 .prop = "intel,ixp4xx-eb-write-enable",
148 .prop = "intel,ixp4xx-eb-byte-access",
154 static void ixp4xx_exp_setup_chipselect(struct ixp4xx_eb *eb,
166 if (eb->is_42x && (cs_index > 7)) {
167 dev_err(eb->dev,
172 if (eb->is_43x && (cs_index > 3)) {
173 dev_err(eb->dev,
191 regmap_read(eb->rmap, IXP4XX_EXP_TIMING_CS0 +
193 dev_info(eb->dev, "CS%d at %#08x, size %#08x, config before: %#08x\n",
194 cs_index, eb->bus_base + IXP4XX_EXP_STRIDE * cs_index,
203 dev_err(eb->dev, "illegal size order %d\n", cs_order);
206 dev_dbg(eb->dev, "CS%d size order: %d\n", cs_index, cs_order);
224 dev_info(eb->dev, "CS%d %s %s\n", cs_index,
231 dev_err(eb->dev,
239 dev_info(eb->dev, "CS%d set %s to %u\n", cs_index, ip->prop, val);
242 ret = of_property_read_u32(np, "intel,ixp4xx-eb-cycle-type", &val);
245 dev_err(eb->dev, "illegal cycle type %d\n", val);
248 dev_info(eb->dev, "CS%d set cycle type %d\n", cs_index, val);
253 if (eb->is_43x) {
261 dev_info(eb->dev, "claims to be Intel strata flash\n");
265 regmap_write(eb->rmap,
268 dev_info(eb->dev, "CS%d wrote %#08x into CS config\n", cs_index, cs_cfg);
277 ixp4xx_exp_setup_chipselect(eb, np,
282 static void ixp4xx_exp_setup_child(struct ixp4xx_eb *eb,
295 dev_dbg(eb->dev, "child %s has %d register sets\n",
318 dev_err(eb->dev, "illegal CS %d\n", csindex);
330 dev_dbg(eb->dev, "CS%d size %#08x\n", csindex, cssize);
340 ixp4xx_exp_setup_chipselect(eb, np, csindex, cssize);
348 struct ixp4xx_eb *eb;
354 eb = devm_kzalloc(dev, sizeof(*eb), GFP_KERNEL);
355 if (!eb)
358 eb->dev = dev;
359 eb->is_42x = of_device_is_compatible(np, "intel,ixp42x-expansion-bus-controller");
360 eb->is_43x = of_device_is_compatible(np, "intel,ixp43x-expansion-bus-controller");
362 eb->rmap = syscon_node_to_regmap(np);
363 if (IS_ERR(eb->rmap))
364 return dev_err_probe(dev, PTR_ERR(eb->rmap), "no regmap\n");
367 ret = regmap_read(eb->rmap, IXP4XX_EXP_CNFG0, &val);
371 eb->bus_base = IXP4XX_EXP_BOOT_BASE;
373 eb->bus_base = IXP4XX_EXP_NORMAL_BASE;
374 dev_info(dev, "expansion bus at %08x\n", eb->bus_base);
376 if (eb->is_43x) {
378 regmap_read(eb->rmap, IXP43X_EXP_UNIT_FUSE_RESET, &val);
397 ixp4xx_exp_setup_child(eb, child);