Lines Matching refs:classes

2541 			unsigned int *classes, unsigned long deadline,
2548 classes[dev->devno] = ATA_DEV_UNKNOWN;
2550 return reset(link, classes, deadline);
2572 unsigned int *classes = ehc->classes;
2674 classes[dev->devno] = ATA_DEV_NONE;
2685 * bang classes, thaw and return.
2689 classes[dev->devno] = ATA_DEV_NONE;
2715 trace_ata_link_hardreset_begin(link, classes, deadline);
2718 trace_ata_link_softreset_begin(link, classes, deadline);
2721 rc = ata_do_reset(link, reset, classes, deadline, true);
2723 trace_ata_link_hardreset_end(link, classes, rc);
2725 trace_ata_link_softreset_end(link, classes, rc);
2739 trace_ata_slave_hardreset_begin(slave, classes,
2741 tmp = ata_do_reset(slave, reset, classes, deadline,
2743 trace_ata_slave_hardreset_end(slave, classes, tmp);
2771 trace_ata_link_softreset_begin(link, classes, deadline);
2772 rc = ata_do_reset(link, reset, classes, deadline, true);
2773 trace_ata_link_softreset_end(link, classes, rc);
2803 classes[dev->devno] = ATA_DEV_ATA;
2805 classes[dev->devno] = ATA_DEV_SEMB_UNSUP;
2826 postreset(link, classes);
2827 trace_ata_link_postreset(link, classes, rc);
2829 postreset(slave, classes);
2830 trace_ata_slave_postreset(slave, classes, rc);
2852 if (classes[dev->devno] == ATA_DEV_UNKNOWN) {
2854 classes[dev->devno] = ATA_DEV_NONE;
2858 if (ata_class_enabled(classes[dev->devno]))
2861 classes[dev->devno]);
2862 classes[dev->devno] = ATA_DEV_NONE;
2863 } else if (classes[dev->devno] == ATA_DEV_UNKNOWN) {
2866 classes[dev->devno] = ATA_DEV_NONE;
3082 rc = ata_dev_revalidate(dev, ehc->classes[dev->devno],
3098 ata_class_enabled(ehc->classes[dev->devno])) {
3105 dev->class = ehc->classes[dev->devno];
3114 ehc->classes[dev->devno] = dev->class;
3150 dev->class = ehc->classes[dev->devno];
3536 ehc->classes[dev->devno] != ATA_DEV_NONE)
3740 ehc->classes[dev->devno] = ATA_DEV_UNKNOWN;