common/pci/pci.c

24  * @hdev: Pointer to hl_device structure.
32 int hl_pci_bars_map(struct hl_device *hdev, const char * const name[3],
35 	struct pci_dev *pdev = hdev->pdev;
40 		dev_err(hdev->dev, "Cannot obtain PCI resources\n");
46 		hdev->pcie_bar[bar] = is_wc[i] ?
49 		if (!hdev->pcie_bar[bar]) {
50 			dev_err(hdev->dev, "pci_ioremap%s_bar failed for %s\n",
62 		if (hdev->pcie_bar[bar])
63 			iounmap(hdev->pcie_bar[bar]);
73  * @hdev: Pointer to hl_device structure.
77 static void hl_pci_bars_unmap(struct hl_device *hdev)
79 	struct pci_dev *pdev = hdev->pdev;
84 		iounmap(hdev->pcie_bar[bar]);
90 int hl_pci_elbi_read(struct hl_device *hdev, u64 addr, u32 *data)
92 	struct pci_dev *pdev = hdev->pdev;
97 	if (hdev->pldm)
126 			trace_habanalabs_elbi_read(hdev->dev, (u32) addr, val);
132 		dev_err(hdev->dev, "Error reading from ELBI\n");
137 		dev_err(hdev->dev, "ELBI read didn't finish in time\n");
141 	dev_err(hdev->dev, "ELBI read has undefined bits in status\n");
147  * @hdev: Pointer to hl_device structure.
153 static int hl_pci_elbi_write(struct hl_device *hdev, u64 addr, u32 data)
155 	struct pci_dev *pdev = hdev->pdev;
160 	if (hdev->pldm)
189 			trace_habanalabs_elbi_write(hdev->dev, (u32) addr, val);
197 		dev_err(hdev->dev, "ELBI write didn't finish in time\n");
201 	dev_err(hdev->dev, "ELBI write has undefined bits in status\n");
207  * @hdev: Pointer to hl_device structure.
213 int hl_pci_iatu_write(struct hl_device *hdev, u32 addr, u32 data)
215 	struct asic_fixed_properties *prop = &hdev->asic_prop;
224 	hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0x00300000);
226 	rc = hl_pci_elbi_write(hdev, prop->pcie_dbi_base_address + dbi_offset,
237  * @hdev: Pointer to hl_device structure.
245 int hl_pci_set_inbound_region(struct hl_device *hdev, u8 region,
248 	struct asic_fixed_properties *prop = &hdev->asic_prop;
257 		bar_phys_base = hdev->pcie_bar_phys[pci_region->bar];
261 		rc |= hl_pci_iatu_write(hdev, offset + 0x8,
263 		rc |= hl_pci_iatu_write(hdev, offset + 0xC,
265 		rc |= hl_pci_iatu_write(hdev, offset + 0x10,
270 	rc |= hl_pci_iatu_write(hdev, offset + 0x14, lower_32_bits(pci_region->addr));
271 	rc |= hl_pci_iatu_write(hdev, offset + 0x18, upper_32_bits(pci_region->addr));
274 	rc |= hl_pci_iatu_write(hdev, offset + 0x0, 0);
284 	rc |= hl_pci_iatu_write(hdev, offset + 0x4, ctrl_reg_val);
290 	hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0);
293 		dev_err(hdev->dev, "failed to map bar %u to 0x%08llx\n",
301  * @hdev: Pointer to hl_device structure.
308 int hl_pci_set_outbound_region(struct hl_device *hdev,
311 	struct asic_fixed_properties *prop = &hdev->asic_prop;
318 	rc |= hl_pci_iatu_write(hdev, 0x008,
320 	rc |= hl_pci_iatu_write(hdev, 0x00C,
322 	rc |= hl_pci_iatu_write(hdev, 0x010,
324 	rc |= hl_pci_iatu_write(hdev, 0x014, 0);
326 	rc |= hl_pci_iatu_write(hdev, 0x018, 0);
328 	rc |= hl_pci_iatu_write(hdev, 0x020,
331 	rc |= hl_pci_iatu_write(hdev, 0x000, 0x00002000);
333 	rc |= hl_pci_iatu_write(hdev, 0x004, 0x80000000);
339 	hl_pci_elbi_write(hdev, prop->pcie_aux_dbi_reg_addr, 0);
346  * @hdev: Pointer to hl_device structure.
352 enum pci_region hl_get_pci_memory_region(struct hl_device *hdev, u64 addr)
357 		struct pci_mem_region *region = &hdev->pci_mem_region[i];
372  * @hdev: Pointer to hl_device structure.
378 int hl_pci_init(struct hl_device *hdev)
380 	struct asic_fixed_properties *prop = &hdev->asic_prop;
381 	struct pci_dev *pdev = hdev->pdev;
386 		dev_err(hdev->dev, "can't enable PCI device\n");
392 	rc = hdev->asic_funcs->pci_bars_map(hdev);
394 		dev_err(hdev->dev, "Failed to map PCI BAR addresses\n");
398 	rc = hdev->asic_funcs->init_iatu(hdev);
400 		dev_err(hdev->dev, "PCI controller was not initialized successfully\n");
405 	if (hdev->asic_prop.iatu_done_by_fw)
410 		dev_err(hdev->dev,
421 	hl_pci_bars_unmap(hdev);
430  * @hdev: Pointer to hl_device structure
434 void hl_pci_fini(struct hl_device *hdev)
436 	hl_pci_bars_unmap(hdev);
438 	pci_disable_device(hdev->pdev);