common/mmu/mmu_v2.c

19  * page tables hops related to this context.
37  * - Free DRAM default page mapping hops
245 static int hl_mmu_v2_get_tlb_info(struct hl_ctx *ctx, u64 virt_addr, struct hl_mmu_hop_info *hops)
262 	hops->range_type = HL_VA_RANGE_TYPE_DRAM;
264 	hops->scrambled_vaddr = hdev->asic_funcs->scramble_addr(hdev, virt_addr);
266 	hops->hop_info[0].hop_addr = hl_mmu_dr_get_phys_hop0_addr(ctx);
267 	hops->hop_info[0].hop_pte_addr = hl_mmu_get_hop_pte_phys_addr(ctx, mmu_prop, 0,
268 						hops->hop_info[0].hop_addr,
269 							hops->scrambled_vaddr);
270 	if (hops->hop_info[0].hop_pte_addr == U64_MAX)
273 	hops->hop_info[0].hop_pte_val = hdev->asic_funcs->read_pte(hdev,
274 						hops->hop_info[0].hop_pte_addr);
275 	if (hops->hop_info[0].hop_pte_val == U64_MAX)
279 		hops->hop_info[i].hop_addr =
280 			hl_mmu_get_next_hop_addr(ctx, hops->hop_info[i - 1].hop_pte_val);
281 		if (hops->hop_info[i].hop_addr == ULLONG_MAX)
284 		hops->hop_info[i].hop_pte_addr =
286 						hops->hop_info[i].hop_addr,
287 						hops->scrambled_vaddr);
288 		if (hops->hop_info[i].hop_pte_addr == U64_MAX)
291 		hops->hop_info[i].hop_pte_val =
293 					hops->hop_info[i].hop_pte_addr);
295 		if (!(hops->hop_info[i].hop_pte_val & PAGE_PRESENT_MASK))
298 		if (hops->hop_info[i].hop_pte_val & mmu_prop->last_mask)
302 	/* if passed over all hops then no last hop was found */
306 	if (!(hops->hop_info[i].hop_pte_val & PAGE_PRESENT_MASK))
309 	if (hops->scrambled_vaddr != virt_addr)
310 		hops->unscrambled_paddr = hdev->asic_funcs->descramble_addr
311 				(hdev, hops->hop_info[i].hop_pte_val);
313 		hops->unscrambled_paddr = hops->hop_info[i].hop_pte_val;
315 	hops->used_hops = i + 1;