x86/net/bpf_jit_comp32.c

189 static u8 add_1reg(u8 byte, u32 dst_reg)
220 			EMIT3_off32(0xC7, add_1reg(0x40, IA32_EBP),
227 			EMIT2_off32(0xC7, add_1reg(0xC0, dst),
304 	EMIT2(0xF7, add_1reg(0xE0, sreg));
384 		EMIT3(0xC1, add_1reg(0xC8, dreg_lo), 8);
396 		EMIT1(add_1reg(0xC8, dreg_lo));
405 		EMIT1(add_1reg(0xC8, dreg_lo));
409 		EMIT1(add_1reg(0xC8, dreg_hi));
460 	EMIT2(0xF7, add_1reg(0xF0, IA32_ECX));
511 	EMIT2(0xD3, add_1reg(b2, dreg));
612 		EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EDX), val);
619 				EMIT3(0x83, add_1reg(0xD0, dreg), val);
624 				EMIT3(0x83, add_1reg(0xC0, dreg), val);
633 				EMIT3(0x83, add_1reg(0xD8, dreg), val);
638 				EMIT3(0x83, add_1reg(0xE8, dreg), val);
646 			EMIT3(0x83, add_1reg(0xC8, dreg), val);
653 			EMIT3(0x83, add_1reg(0xE0, dreg), val);
660 			EMIT3(0x83, add_1reg(0xF0, dreg), val);
665 		EMIT2(0xF7, add_1reg(0xD8, dreg));
713 	EMIT2(0xF7, add_1reg(0xD8, dreg_lo));
715 	EMIT3(0x83, add_1reg(0xD0, dreg_hi), 0x00);
717 	EMIT2(0xF7, add_1reg(0xD8, dreg_hi));
757 	EMIT2(0xD3, add_1reg(0xE0, dreg_lo));
762 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
810 	EMIT2(0xD3, add_1reg(0xF8, dreg_hi));
815 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
822 	EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
863 	EMIT2(0xD3, add_1reg(0xE8, dreg_hi));
868 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), 32);
909 		EMIT3(0xC1, add_1reg(0xE0, dreg_lo), val);
914 		EMIT3(0xC1, add_1reg(0xE0, dreg_lo), value);
958 		EMIT3(0xC1, add_1reg(0xE8, dreg_hi), val);
963 		EMIT3(0xC1, add_1reg(0xE8, dreg_hi), value);
1006 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), val);
1011 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), value);
1016 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
1019 		EMIT3(0xC1, add_1reg(0xF8, dreg_hi), 31);
1051 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));
1054 		EMIT2(0xF7, add_1reg(0xE0, src_lo));
1069 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_hi));
1072 		EMIT2(0xF7, add_1reg(0xE0, src_hi));
1087 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(src_lo));
1090 		EMIT2(0xF7, add_1reg(0xE0, src_lo));
1121 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val);
1124 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_hi));
1127 		EMIT2(0xF7, add_1reg(0xE0, dst_hi));
1133 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), hi);
1136 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));
1139 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));
1144 	EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EAX), val);
1147 		EMIT3(0xF7, add_1reg(0x60, IA32_EBP), STACK_VAR(dst_lo));
1150 		EMIT2(0xF7, add_1reg(0xE0, dst_lo));
1223 	EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 12);
1257 	EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 12);
1335 	EMIT3(0x83, add_1reg(0xF8, IA32_EBX), hi);
1338 	EMIT3(0x83, add_1reg(0xF8, IA32_ECX), lo);
1344 	EMIT3(0x83, add_1reg(0xC0, IA32_ECX), 0x01);
1346 	EMIT3(0x83, add_1reg(0xD0, IA32_EBX), 0x00);
1371 	EMIT3(0x83, add_1reg(0xC0, IA32_EDX), PROLOGUE_SIZE);
1652 		EMIT3(0x83, add_1reg(0xC0, IA32_ESP), bytes_in_stack);
1760 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
1780 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
1803 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX),
1825 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
1935 				EMIT2(add_1reg(0x40, IA32_EAX), insn->off);
1937 				EMIT1_off32(add_1reg(0x80, IA32_EAX),
1945 				EMIT2_off32(0xC7, add_1reg(0x80, IA32_EAX),
2056 					EMIT3(0xC7, add_1reg(0x40, IA32_EBP),
2137 			EMIT3(0x83, add_1reg(0xC0, IA32_ESP), 32);
2301 			EMIT2_off32(0xC7, add_1reg(0xC0, sreg_lo), imm32);
2308 				EMIT2_off32(0xC7, add_1reg(0xC0, sreg_hi), hi);
2350 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
2354 				EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);
2396 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_ECX), imm32);
2399 			EMIT2_off32(0xC7, add_1reg(0xC0, IA32_EBX), hi);