Lines Matching refs:guest
71 struct pt_ctx guest;
98 /* Basic info about guest LBR records. */
103 * per-vcpu guest LBR event is scheduled on the current pcpu.
120 /* Has the level1 guest done vmxon? */
125 /* The guest-physical address of the current VMCS L1 keeps for L2 */
128 * Cache of the guest's VMCS, existing outside of guest memory.
129 * Loaded from guest memory during VMPTRLD. Flushed to guest
134 * Cache of the guest's shadow VMCS, existing outside of guest
135 * memory. Loaded from guest memory during VM entry. Flushed
136 * to guest memory during VM exit.
167 * Indicates lazily loaded guest state has not yet been decached from
220 * order to propagate the guest's pre-VM-Enter value into vmcs02. For
243 /* in guest mode on SMM entry? */
262 * to/from the kernel, and the registers have been loaded with guest
274 * User return MSRs are always emulated when enabled in the guest, but
291 * non-nested (L1) guest, it always points to vmcs01. For a nested
292 * guest (L2), it points to a different VMCS.
298 struct vmx_msrs guest;
303 struct vmx_msrs guest;
331 /* Support for a guest hypervisor (nested VMX) */
646 * Note! CR0.WP technically can be passed through to the guest if