Lines Matching refs:msr_data
2405 u64 msr_data;
2422 ops->get_msr(ctxt, MSR_STAR, &msr_data);
2423 msr_data >>= 32;
2424 cs_sel = (u16)(msr_data & 0xfffc);
2425 ss_sel = (u16)(msr_data + 8);
2441 MSR_LSTAR : MSR_CSTAR, &msr_data);
2442 ctxt->_eip = msr_data;
2444 ops->get_msr(ctxt, MSR_SYSCALL_MASK, &msr_data);
2445 ctxt->eflags &= ~msr_data;
2450 ops->get_msr(ctxt, MSR_STAR, &msr_data);
2451 ctxt->_eip = (u32)msr_data;
2464 u64 msr_data;
2485 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
2486 if ((msr_data & 0xfffc) == 0x0)
2491 cs_sel = (u16)msr_data & ~SEGMENT_RPL_MASK;
2501 ops->get_msr(ctxt, MSR_IA32_SYSENTER_EIP, &msr_data);
2502 ctxt->_eip = (efer & EFER_LMA) ? msr_data : (u32)msr_data;
2504 ops->get_msr(ctxt, MSR_IA32_SYSENTER_ESP, &msr_data);
2505 *reg_write(ctxt, VCPU_REGS_RSP) = (efer & EFER_LMA) ? msr_data :
2506 (u32)msr_data;
2517 u64 msr_data, rcx, rdx;
2538 ops->get_msr(ctxt, MSR_IA32_SYSENTER_CS, &msr_data);
2541 cs_sel = (u16)(msr_data + 16);
2542 if ((msr_data & 0xfffc) == 0x0)
2544 ss_sel = (u16)(msr_data + 24);
2549 cs_sel = (u16)(msr_data + 32);
2550 if (msr_data == 0x0)
3346 u64 msr_data;
3349 msr_data = (u32)reg_read(ctxt, VCPU_REGS_RAX)
3351 r = ctxt->ops->set_msr_with_filter(ctxt, msr_index, msr_data);
3362 u64 msr_data;
3365 r = ctxt->ops->get_msr_with_filter(ctxt, msr_index, &msr_data);
3371 *reg_write(ctxt, VCPU_REGS_RAX) = (u32)msr_data;
3372 *reg_write(ctxt, VCPU_REGS_RDX) = msr_data >> 32;