Lines Matching refs:lo
105 u32 lo, hi;
114 rdmsr(MSR_AMD64_SYSCFG, lo, hi);
115 if (lo & K8_MTRRFIXRANGE_DRAM_MODIFY) {
119 lo &= ~K8_MTRRFIXRANGE_DRAM_MODIFY;
120 mtrr_wrmsr(MSR_AMD64_SYSCFG, lo, hi);
691 unsigned lo, dummy;
696 rdmsr(MSR_MTRRcap, lo, dummy);
697 mtrr_state.have_fixed = lo & MTRR_CAP_FIX;
704 rdmsr(MSR_MTRRdefType, lo, dummy);
705 mtrr_state.def_type = lo & MTRR_DEF_TYPE_TYPE;
706 mtrr_state.enabled = (lo & MTRR_DEF_TYPE_ENABLE) >> MTRR_STATE_SHIFT;
767 unsigned lo, hi;
769 rdmsr(msr, lo, hi);
771 if (lo != msrwords[0] || hi != msrwords[1]) {
886 unsigned int lo, hi;
889 rdmsr(MTRRphysBase_MSR(index), lo, hi);
890 if ((vr->base_lo & ~MTRR_PHYSBASE_RSVD) != (lo & ~MTRR_PHYSBASE_RSVD)
897 rdmsr(MTRRphysMask_MSR(index), lo, hi);
899 if ((vr->mask_lo & ~MTRR_PHYSMASK_RSVD) != (lo & ~MTRR_PHYSMASK_RSVD)