Lines Matching defs:set
163 /* Is the enable bit set? */
223 * the transfer segment sizes are set at run time.
232 * are set at run time. All have 64k limits.
420 /* Warn after we've set the missing bits. */
448 void cr4_update_irqsoff(unsigned long set, unsigned long clear)
454 newval = (cr4 & ~clear) | set;
486 * parsed), record any of the sensitive CR bits that are set, and
523 * bit to be set. Enforce it.
654 * Note: cpuid_level is set to -1 if unavailable, but
655 * extended_extended_level is set to 0 if unavailable
676 * This table only is used unless init_<vendor>() below doesn't set it;
766 * %fs is already set to __KERNEL_PERCPU, but after switching GDT
936 * a hypervisor might have set the individual AMD bits even on
1305 * VMMs set ARCH_CAP_RFDS_CLEAR for processors not in the blacklist to
1365 * When the CPU is not mitigated for TAA (TAA_NO=0) set TAA bug when:
1710 * CPUID bit above wasn't set. If this kernel is still running
1714 * means, the bug is present: set the BUG flag and return.
1875 * On SMP, boot_cpu_data holds the common feature set between
2177 /* For IDT mode, IST vectors need to be set in TSS. */
2350 * Must be before alternatives because it might set or clear