Lines Matching refs:pin
75 #define for_each_pin(idx, pin) \
76 for ((pin) = 0; (pin) < ioapics[(idx)].nr_registers; (pin)++)
77 #define for_each_ioapic_pin(idx, pin) \
79 for_each_pin((idx), (pin))
90 int apic, pin;
149 static inline u32 mp_pin_to_gsi(int ioapic, int pin)
151 return mp_ioapic_gsi_routing(ioapic)->gsi_base + pin;
291 static struct IO_APIC_route_entry __ioapic_read_entry(int apic, int pin)
295 entry.w1 = io_apic_read(apic, 0x10 + 2 * pin);
296 entry.w2 = io_apic_read(apic, 0x11 + 2 * pin);
301 static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
307 entry = __ioapic_read_entry(apic, pin);
319 static void __ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
321 io_apic_write(apic, 0x11 + 2*pin, e.w2);
322 io_apic_write(apic, 0x10 + 2*pin, e.w1);
325 static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
330 __ioapic_write_entry(apic, pin, e);
339 static void ioapic_mask_entry(int apic, int pin)
345 io_apic_write(apic, 0x10 + 2*pin, e.w1);
346 io_apic_write(apic, 0x11 + 2*pin, e.w2);
351 * The common case is 1:1 IRQ<->pin mappings. Sometimes there are
356 int node, int apic, int pin)
362 if (entry->apic == apic && entry->pin == pin)
368 node, apic, pin);
372 entry->pin = pin;
378 static void __remove_pin_from_irq(struct mp_chip_data *data, int apic, int pin)
383 if (entry->apic == apic && entry->pin == pin) {
391 int node, int apic, int pin)
393 if (__add_pin_to_irq_node(data, node, apic, pin))
394 panic("IO-APIC: failed to add irq-pin. Can not proceed\n");
398 * Reroute an IRQ to a different pin.
407 if (entry->apic == oldapic && entry->pin == oldpin) {
409 entry->pin = newpin;
415 /* old apic/pin didn't exist, so just add new ones */
427 io_apic_write(entry->apic, 0x10 + 2 * entry->pin, data->entry.w1);
486 static void __eoi_ioapic_pin(int apic, int pin, int vector)
493 entry = entry1 = __ioapic_read_entry(apic, pin);
501 __ioapic_write_entry(apic, pin, entry1);
506 __ioapic_write_entry(apic, pin, entry);
517 __eoi_ioapic_pin(entry->apic, entry->pin, vector);
521 static void clear_IO_APIC_pin(unsigned int apic, unsigned int pin)
525 /* Check delivery_mode to be sure we're not clearing an SMI pin */
526 entry = ioapic_read_entry(apic, pin);
532 * if it is a level triggered pin and if the remote-IRR is set.
536 ioapic_write_entry(apic, pin, entry);
537 entry = ioapic_read_entry(apic, pin);
550 ioapic_write_entry(apic, pin, entry);
553 __eoi_ioapic_pin(apic, pin, entry.vector);
561 ioapic_mask_entry(apic, pin);
562 entry = ioapic_read_entry(apic, pin);
564 pr_err("Unable to reset IRR for apic: %d, pin :%d\n",
565 mpc_ioapic_id(apic), pin);
570 int apic, pin;
572 for_each_ioapic_pin(apic, pin)
573 clear_IO_APIC_pin(apic, pin);
619 int apic, pin;
628 for_each_pin(apic, pin)
629 ioapics[apic].saved_registers[pin] =
630 ioapic_read_entry(apic, pin);
641 int apic, pin;
647 for_each_pin(apic, pin) {
650 entry = ioapics[apic].saved_registers[pin];
653 ioapic_write_entry(apic, pin, entry);
664 int apic, pin;
670 for_each_pin(apic, pin)
671 ioapic_write_entry(apic, pin,
672 ioapics[apic].saved_registers[pin]);
678 * Find the IRQ entry number of a certain pin.
680 static int find_irq_entry(int ioapic_idx, int pin, int type)
688 mp_irqs[i].dstirq == pin)
695 * Find the pin to which IRQ[irq] (ISA) is connected
832 int ioapic, pin, idx;
841 pin = mp_find_ioapic_pin(ioapic, gsi);
842 if (pin < 0)
845 idx = find_irq_entry(ioapic, pin, mp_INT);
876 u32 gsi, int ioapic_idx, int pin)
883 dst->ioapic.pin = pin;
934 * pin with real trigger and polarity attributes.
982 * between IOAPIC pin and IRQ number. A typical IOAPIC has 24 pins, pin 0-15 are
983 * used for legacy IRQs and pin 16-23 are used for PCI IRQs (PIRQ A-H).
990 int irq, int ioapic, int pin,
998 * Legacy ISA IRQ has already been allocated, just add pin to
999 * the pin list associated with this IRQ and program the IOAPIC
1006 info->ioapic.pin))
1022 static int mp_map_pin_to_irq(u32 gsi, int idx, int ioapic, int pin,
1052 irq = irq_find_mapping(domain, pin);
1057 ioapic_copy_alloc_attr(&tmp, info, gsi, ioapic, pin);
1060 ioapic, pin, &tmp);
1061 else if ((irq = irq_find_mapping(domain, pin)) == 0)
1075 static int pin_2_irq(int idx, int ioapic, int pin, unsigned int flags)
1077 u32 gsi = mp_pin_to_gsi(ioapic, pin);
1082 if (mp_irqs[idx].dstirq != pin)
1089 if ((pin >= 16) && (pin <= 23)) {
1090 if (pirq_entries[pin-16] != -1) {
1091 if (!pirq_entries[pin-16]) {
1093 "disabling PIRQ%d\n", pin-16);
1095 int irq = pirq_entries[pin-16];
1098 pin-16, irq);
1105 return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, NULL);
1110 int ioapic, pin, idx;
1116 pin = mp_find_ioapic_pin(ioapic, gsi);
1117 idx = find_irq_entry(ioapic, pin, mp_INT);
1121 return mp_map_pin_to_irq(gsi, idx, ioapic, pin, flags, info);
1146 int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin)
1151 "querying PCI -> IRQ mapping bus:%d, slot:%d, pin:%d.\n",
1152 bus, slot, pin);
1181 if (pin == (mp_irqs[i].srcbusirq & 3)) {
1188 * Use the first all-but-pin matching entry as a
1209 unsigned int ioapic, pin;
1214 for_each_ioapic_pin(ioapic, pin) {
1215 idx = find_irq_entry(ioapic, pin, mp_INT);
1218 KERN_DEBUG " apic %d pin %d not connected\n",
1219 mpc_ioapic_id(ioapic), pin);
1221 pin_2_irq(idx, ioapic, pin,
1241 " pin%02x, %s, %s, %s, V(%02X), IRR(%1d), S(%1d)",
1337 printk(KERN_DEBUG "IRQ to pin mappings:\n");
1354 pr_cont("-> %d:%d", entry->apic, entry->pin);
1362 static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
1367 int apic, pin;
1375 for_each_ioapic_pin(apic, pin) {
1377 struct IO_APIC_route_entry entry = ioapic_read_entry(apic, pin);
1380 * I have found the pin where the i8259 is connected.
1385 ioapic_i8259.pin = pin;
1391 /* If we could not find the appropriate pin by looking at the ioapic
1398 if ((ioapic_i8259.pin == -1) && (i8259_pin >= 0)) {
1400 ioapic_i8259.pin = i8259_pin;
1404 if (((ioapic_i8259.apic != i8259_apic) || (ioapic_i8259.pin != i8259_pin)) &&
1405 (i8259_pin >= 0) && (ioapic_i8259.pin >= 0))
1423 if (ioapic_i8259.pin != -1) {
1439 ioapic_write_entry(ioapic_i8259.apic, ioapic_i8259.pin, entry);
1443 disconnect_bsp_APIC(ioapic_i8259.pin != -1);
1702 int pin;
1704 pin = entry->pin;
1705 e.w1 = io_apic_read(entry->apic, 0x10 + pin*2);
1845 * Intr-remapping uses pin number as the virtual vector
1848 * EOI we use the pin number.
1880 * - DMAR/IR: 8bit subhandle (ioapic.pin)
1911 __ioapic_write_entry(entry->apic, entry->pin, mpd->entry);
1931 * Interrupt shutdown masks the ioapic pin, but the interrupt might already
1958 rentry = __ioapic_read_entry(p->apic, p->pin);
2072 int apic, pin, i;
2077 pin = find_isa_irq_pin(8, mp_INT);
2078 if (pin == -1) {
2088 entry0 = ioapic_read_entry(apic, pin);
2089 clear_IO_APIC_pin(apic, pin);
2103 ioapic_write_entry(apic, pin, entry1);
2120 clear_IO_APIC_pin(apic, pin);
2122 ioapic_write_entry(apic, pin, entry0);
2134 static int mp_alloc_timer_irq(int ioapic, int pin)
2144 info.ioapic.pin = pin;
2146 irq = alloc_isa_irq_from_domain(domain, 0, ioapic, pin, &info);
2194 pin2 = ioapic_i8259.pin;
2204 * interrupt input. So just in case, if only one pin
2249 "..... (found apic %d pin %d) ...\n", apic2, pin2);
2311 * to devices. However there may be an I/O APIC pin available for
2312 * this interrupt regardless. The pin may be left unconnected, but
2314 * the master 8259A. In the MPS case such a pin will normally be
2904 int ioapic, pin;
2917 for_each_pin(ioapic, pin) {
2918 u32 gsi = mp_pin_to_gsi(ioapic, pin);
2925 pr_warn("pin%d on IOAPIC%d is still in use.\n",
2926 pin, ioapic);
3001 int ret, ioapic, pin;
3011 pin = info->ioapic.pin;
3012 if (irq_find_mapping(domain, (irq_hw_number_t)pin) > 0)
3026 irq_data->hwirq = info->ioapic.pin;
3030 mp_irqdomain_get_attr(mp_pin_to_gsi(ioapic, pin), data, info);
3032 add_pin_to_irq_node(data, ioapic_alloc_attr_node(info), ioapic, pin);
3044 ioapic, mpc_ioapic_id(ioapic), pin, virq,