x86/hyperv/mmu.c

17 /* Each gva in gva_list encodes up to 4096 pages to flush */
38 		 * pages to flush (in addition to the 'cur' page).
64 	struct hv_tlb_flush *flush;
76 	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
78 	if (unlikely(!flush)) {
88 		flush->address_space = virt_to_phys(info->mm->pgd);
89 		flush->address_space &= CR3_ADDR_MASK;
90 		flush->flags = 0;
92 		flush->address_space = 0;
93 		flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
96 	flush->processor_mask = 0;
98 		flush->flags |= HV_FLUSH_ALL_PROCESSORS;
129 				  &flush->processor_mask);
132 		/* nothing to flush if 'processor_mask' ends up being empty */
133 		if (!flush->processor_mask) {
140 	 * We can flush not more than max_gvas with one hypercall. Flush the
143 	max_gvas = (PAGE_SIZE - sizeof(*flush)) / sizeof(flush->gva_list[0]);
146 		flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
148 					 flush, NULL);
152 					 flush, NULL);
154 		gva_n = fill_gva_list(flush->gva_list, 0,
157 					     gva_n, 0, flush, NULL);
177 	struct hv_tlb_flush_ex *flush;
183 	flush = *this_cpu_ptr(hyperv_pcpu_input_arg);
190 		flush->address_space = virt_to_phys(info->mm->pgd);
191 		flush->address_space &= CR3_ADDR_MASK;
192 		flush->flags = 0;
194 		flush->address_space = 0;
195 		flush->flags = HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES;
198 	flush->hv_vp_set.valid_bank_mask = 0;
200 	flush->hv_vp_set.format = HV_GENERIC_SET_SPARSE_4K;
201 	nr_bank = cpumask_to_vpset_skip(&flush->hv_vp_set, cpus,
207 	 * We can flush not more than max_gvas with one hypercall. Flush the
211 		(PAGE_SIZE - sizeof(*flush) - nr_bank *
212 		 sizeof(flush->hv_vp_set.bank_contents[0])) /
213 		sizeof(flush->gva_list[0]);
216 		flush->flags |= HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY;
219 			0, nr_bank, flush, NULL);
224 			0, nr_bank, flush, NULL);
226 		gva_n = fill_gva_list(flush->gva_list, nr_bank,
230 			gva_n, nr_bank, flush, NULL);
241 	pr_info("Using hypercall for remote TLB flush\n");