events/intel/ds.c

184 	 * bit 4: TLB access
196 	 * bit 0: hit L1 data cache
206 	 * bit 5: Locked prefix
311 	 * use the mapping table for bit 0-3
333 	 * bit 6: load was blocked since its data could not be forwarded
340 	 * bit 7: load was blocked due to potential address conflict with
361 	 * use the mapping table for bit 0-3
1672 	 * Clear exact bit (which uses x86 EFLAGS Reserved bit 3),
1928 get_next_pebs_record_by_bit(void *base, void *top, int bit)
1947 		if (test_bit(bit, (unsigned long *)&status)) {
1952 			if (status == (1 << bit))
1955 			/* clear non-PEBS bit and re-check */
1958 			if (pebs_status == (1 << bit))
2040 		       int bit, int count,
2051 	void *at = get_next_pebs_record_by_bit(base, top, bit);
2072 		at = get_next_pebs_record_by_bit(at, top, bit);
2136 	int bit;
2145 	for_each_set_bit(bit, (unsigned long *)&cpuc->pebs_enabled, size) {
2146 		event = cpuc->events[bit];
2160 	int bit, i, size;
2192 			for_each_set_bit(bit, (unsigned long *)&pebs_status, size)
2193 				counts[bit]++;
2210 		bit = find_first_bit((unsigned long *)&pebs_status,
2212 		if (bit >= x86_pmu.max_pebs_events)
2230 		if (pebs_status != (1ULL << bit)) {
2236 		counts[bit]++;
2239 	for_each_set_bit(bit, (unsigned long *)&mask, size) {
2240 		if ((counts[bit] == 0) && (error[bit] == 0))
2243 		event = cpuc->events[bit];
2251 		if (error[bit]) {
2252 			perf_log_lost_samples(event, error[bit]);
2258 		if (counts[bit]) {
2260 					       top, bit, counts[bit],
2275 	int bit, size;
2301 		for_each_set_bit(bit, (unsigned long *)&pebs_status, size)
2302 			counts[bit]++;
2305 	for_each_set_bit(bit, (unsigned long *)&mask, size) {
2306 		if (counts[bit] == 0)
2309 		event = cpuc->events[bit];
2317 				       top, bit, counts[bit],
2329 	 * No support for 32bit formats