Lines Matching defs:ireg
33 struct biosregs ireg, oreg;
41 initregs(&ireg);
42 ireg.ax = 0x4f00;
43 ireg.di = (size_t)&vginfo;
44 intcall(0x10, &ireg, &oreg);
65 ireg.ax = 0x4f01;
66 ireg.cx = mode;
67 ireg.di = (size_t)&vminfo;
68 intcall(0x10, &ireg, &oreg);
106 struct biosregs ireg, oreg;
112 initregs(&ireg);
113 ireg.ax = 0x4f01;
114 ireg.cx = vesa_mode;
115 ireg.di = (size_t)&vminfo;
116 intcall(0x10, &ireg, &oreg);
135 initregs(&ireg);
136 ireg.ax = 0x4f02;
137 ireg.bx = vesa_mode;
138 intcall(0x10, &ireg, &oreg);
163 struct biosregs ireg, oreg;
168 initregs(&ireg);
169 ireg.ax = 0x4f08;
170 ireg.bh = 0x08;
171 intcall(0x10, &ireg, &oreg);
191 struct biosregs ireg, oreg;
193 initregs(&ireg);
194 ireg.ax = 0x4f0a;
195 intcall(0x10, &ireg, &oreg);
239 struct biosregs ireg, oreg;
247 initregs(&ireg);
248 ireg.ax = 0x4f15; /* VBE DDC */
249 /* ireg.bx = 0x0000; */ /* Report DDC capabilities */
250 /* ireg.cx = 0; */ /* Controller 0 */
251 ireg.es = 0; /* ES:DI must be 0 by spec */
252 intcall(0x10, &ireg, &oreg);
260 ireg.ax = 0x4f15; /* VBE DDC */
261 ireg.bx = 0x0001; /* Read EDID */
262 /* ireg.cx = 0; */ /* Controller 0 */
263 /* ireg.dx = 0; */ /* EDID block number */
264 ireg.es = ds();
265 ireg.di =(size_t)&boot_params.edid_info; /* (ES:)Pointer to block */
266 intcall(0x10, &ireg, &oreg);