Lines Matching defs:instruction

96  * handle an instruction that does an unaligned memory access by emulating the
98 * - note that PC _may not_ point to the faulting instruction
99 * (if that instruction is in a branch delay slot)
102 static int handle_unaligned_ins(insn_size_t instruction, struct pt_regs *regs,
110 index = (instruction>>8)&15; /* 0x0F00 */
113 index = (instruction>>4)&15; /* 0x00F0 */
116 count = 1<<(instruction&3);
126 switch (instruction>>12) {
128 if (instruction & 8) {
160 dstu += (instruction&0x000F)<<2;
168 if (instruction & 4)
182 srcu += (instruction & 0x000F) << 2;
193 if (instruction & 4)
208 switch ((instruction&0xFF00)>>8) {
215 dstu += (instruction & 0x000F) << 1;
224 srcu += (instruction & 0x000F) << 1;
242 srcu += (instruction & 0x00FF) << 1;
259 srcu += (instruction & 0x00FF) << 2;
279 * emulate the instruction in the delay slot
280 * - fetches the instruction from PC+2
286 insn_size_t instruction;
290 if (copy_from_user(&instruction, addr, sizeof(instruction))) {
291 /* the instruction-fetch faulted */
300 return handle_unaligned_ins(instruction, regs, ma);
304 * handle an instruction that does an unaligned memory access
319 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
329 if (instruction_size(instruction) != 2)
332 index = (instruction>>8)&15; /* 0x0F00 */
343 unaligned_fixups_notify(current, instruction, regs);
349 switch (instruction&0xF000) {
351 if (instruction==0x000B) {
353 ret = handle_delayslot(regs, instruction, ma);
357 else if ((instruction&0x00FF)==0x0023) {
359 ret = handle_delayslot(regs, instruction, ma);
363 else if ((instruction&0x00FF)==0x0003) {
365 ret = handle_delayslot(regs, instruction, ma);
384 if ((instruction&0x00FF)==0x002B) {
386 ret = handle_delayslot(regs, instruction, ma);
390 else if ((instruction&0x00FF)==0x000B) {
392 ret = handle_delayslot(regs, instruction, ma);
411 switch (instruction&0x0F00) {
420 ret = handle_delayslot(regs, instruction, ma);
427 regs->pc += SH_PC_8BIT_OFFSET(instruction);
434 ret = handle_delayslot(regs, instruction, ma);
441 regs->pc += SH_PC_8BIT_OFFSET(instruction);
451 ret = handle_delayslot(regs, instruction, ma);
453 regs->pc += SH_PC_12BIT_OFFSET(instruction);
457 ret = handle_delayslot(regs, instruction, ma);
460 regs->pc += SH_PC_12BIT_OFFSET(instruction);
469 /* handle non-delay-slot instruction */
471 ret = handle_unaligned_ins(instruction, regs, ma);
473 regs->pc += instruction_size(instruction);
479 * - instruction address error:
485 * Unfortuntaly we can't distinguish between instruction address error
493 insn_size_t instruction;
508 if (copy_from_user(&instruction, (insn_size_t __user *)(regs->pc & ~1),
509 sizeof(instruction))) {
514 unaligned_fixups_notify(current, instruction, regs);
523 regs->pc += instruction_size(instruction);
534 tmp = handle_unaligned_access(instruction, regs,
552 if (copy_from_kernel_nofault(&instruction, (void *)(regs->pc),
553 sizeof(instruction))) {
554 /* Argh. Fault on the instruction itself.
560 unaligned_fixups_notify(current, instruction, regs);
562 handle_unaligned_access(instruction, regs, &kernel_mem_access,
586 /* Check for any type of DSP or support instruction */
636 /* Check if it's a DSP instruction */
638 /* Enable DSP mode, and restart instruction. */
650 die_if_no_fixup("reserved instruction", regs, error_code);
724 die_if_no_fixup("illegal slot instruction", regs, inst);