Lines Matching defs:fpscr
47 "sts.l fpscr, @-%0\n\t"
48 "lds %2, fpscr\n\t"
83 "lds %3, fpscr\n\t":"=r" (dummy)
96 asm volatile ("lds %2, fpscr\n\t"
131 "lds.l @%0+, fpscr\n\t"
230 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR))
242 int fpscr;
250 fpscr = tsk->thread.xstate->hardfpu.fpscr;
251 prec = fpscr & FPSCR_DBL_PRECISION;
253 if ((fpscr & FPSCR_CAUSE_ERROR)
266 } else if ((fpscr & FPSCR_CAUSE_ERROR)
280 int fpscr;
288 fpscr = tsk->thread.xstate->hardfpu.fpscr;
289 prec = fpscr & FPSCR_DBL_PRECISION;
291 if ((fpscr & FPSCR_CAUSE_ERROR)
307 } else if ((fpscr & FPSCR_CAUSE_ERROR)
324 int fpscr;
332 fpscr = tsk->thread.xstate->hardfpu.fpscr;
333 prec = fpscr & FPSCR_DBL_PRECISION;
335 if ((fpscr & FPSCR_CAUSE_ERROR)
350 } else if ((fpscr & FPSCR_CAUSE_ERROR)
370 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)
397 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.xstate->hardfpu.fpscr);
409 tsk->thread.xstate->hardfpu.fpscr &=
411 tsk->thread.xstate->hardfpu.fpscr |= fpu_exception_flags;
414 tsk->thread.xstate->hardfpu.fpscr |= (fpu_exception_flags >> 10);
418 if ((((tsk->thread.xstate->hardfpu.fpscr & FPSCR_ENABLE_MASK) >> 7) &