drivers/pci/pci-sh7780.c

100 	addr = __raw_readl(hose->reg_base + SH4_PCIALR);
105 	status = __raw_readw(hose->reg_base + PCI_STATUS);
113 			__raw_writew(cmd, hose->reg_base + PCI_STATUS);
119 	status = __raw_readl(hose->reg_base + SH4_PCIAINT);
127 	__raw_writel(cmd, hose->reg_base + SH4_PCIAINT);
132 	status = __raw_readl(hose->reg_base + SH4_PCIINT);
140 	__raw_writel(cmd, hose->reg_base + SH4_PCIINT);
154 	__raw_writel(SH4_PCIINTM_SDIM, hose->reg_base + SH4_PCIINTM);
169 	__raw_writel(0, hose->reg_base + SH4_PCIAINT);
177 		     PCI_STATUS_PARITY, hose->reg_base + PCI_STATUS);
202 		     SH4_PCIAINT_WDPE, hose->reg_base + SH4_PCIAINTM);
210 		     SH4_PCIINTM_MRDPEIM, hose->reg_base + SH4_PCIINTM);
229 	tmp = __raw_readl(hose->reg_base + SH4_PCICR);
231 	__raw_writel(tmp, hose->reg_base + SH4_PCICR);
234 	tmp = __raw_readw(hose->reg_base + PCI_STATUS);
236 	__raw_writew(tmp, hose->reg_base + PCI_STATUS);
239 	tmp = __raw_readl(hose->reg_base + SH4_PCICR);
241 	__raw_writel(tmp, hose->reg_base + SH4_PCICR);
255 	chan->reg_base = 0xfe040000;
262 		     chan->reg_base + SH4_PCICR);
271 	id = __raw_readw(chan->reg_base + PCI_VENDOR_ID);
277 	id = __raw_readw(chan->reg_base + PCI_DEVICE_ID);
290 		  type, __raw_readb(chan->reg_base + PCI_REVISION_ID));
297 		     chan->reg_base + SH4_PCICR);
307 		__raw_writel(memphys + SZ_512M, chan->reg_base + SH4_PCILAR1);
309 			     chan->reg_base + SH4_PCILSR1);
315 		__raw_writel(0, chan->reg_base + SH4_PCILAR1);
316 		__raw_writel(0, chan->reg_base + SH4_PCILSR1);
323 	__raw_writel(memphys, chan->reg_base + SH4_PCILAR0);
325 		     chan->reg_base + SH4_PCILSR0);
337 	__raw_writel(0, chan->reg_base + SH7780_PCICSCR0);
338 	__raw_writel(0, chan->reg_base + SH7780_PCICSAR0);
339 	__raw_writel(0, chan->reg_base + SH7780_PCICSCR1);
340 	__raw_writel(0, chan->reg_base + SH7780_PCICSAR1);
368 			     chan->reg_base + SH7780_PCIMBMR(i - 1));
369 		__raw_writel(res->start, chan->reg_base + SH7780_PCIMBR(i - 1));
375 	__raw_writel(0, chan->reg_base + PCI_BASE_ADDRESS_0);
376 	__raw_writel(0, chan->reg_base + SH7780_PCIIOBR);
377 	__raw_writel(0, chan->reg_base + SH7780_PCIIOBMR);
381 		     PCI_COMMAND_MEMORY, chan->reg_base + PCI_COMMAND);
389 		     chan->reg_base + SH4_PCICR);
398 		  (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ)