drivers/pci/pci-sh7751.c

19 static int __init __area_sdram_check(struct pci_channel *chan,
31 	pci_write_reg(chan, word, SH4_PCIBCR1);
40 	pci_write_reg(chan, word, SH4_PCIBCR2);
77 	struct pci_channel *chan = &sh7751_pci_controller;
83 	chan->reg_base = 0xfe200000;
86 	id = pci_read_reg(chan, SH7751_PCICONF0);
99 	pci_write_reg(chan, 0, SH4_PCICLKR);
102 	pci_write_reg(chan, word, SH4_PCIPINT);
110 	pci_write_reg(chan, word, SH7751_PCICONF1);
114 	pci_write_reg(chan, word, SH7751_PCICONF2);
120 	pci_write_reg(chan, word, SH4_PCILSR0);
123 	pci_write_reg(chan, word, SH4_PCILAR0);
124 	pci_write_reg(chan, word, SH7751_PCICONF5);
129 	word = chan->resources[1].start & SH4_PCIMBR_MASK;
131 	pci_write_reg(chan, word , SH4_PCIMBR);
135 	word = chan->resources[0].start & SH4_PCIIOBR_MASK;
137 	pci_write_reg(chan, word, SH4_PCIIOBR);
143 	case SH7751_CS0_BASE_ADDR: word = __area_sdram_check(chan, 0); break;
144 	case SH7751_CS1_BASE_ADDR: word = __area_sdram_check(chan, 1); break;
145 	case SH7751_CS2_BASE_ADDR: word = __area_sdram_check(chan, 2); break;
146 	case SH7751_CS3_BASE_ADDR: word = __area_sdram_check(chan, 3); break;
147 	case SH7751_CS4_BASE_ADDR: word = __area_sdram_check(chan, 4); break;
148 	case SH7751_CS5_BASE_ADDR: word = __area_sdram_check(chan, 5); break;
149 	case SH7751_CS6_BASE_ADDR: word = __area_sdram_check(chan, 6); break;
157 	pci_write_reg(chan, word, SH4_PCIWCR1);
159 	pci_write_reg(chan, word, SH4_PCIWCR2);
161 	pci_write_reg(chan, word, SH4_PCIWCR3);
163 	pci_write_reg(chan, word, SH4_PCIMCR);
170 	pci_fixup_pcic(chan);
175 	pci_write_reg(chan, word, SH4_PCICR);
177 	return register_pci_controller(chan);