include/asm/fpu-insn-asm.h

103 	.ifc \vxr,%v3
204  * @v3:		Vector register designated operand whose MSB is stored in
212  * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but
219 .macro	RXB	rxb v1 v2=0 v3=0 v4=0
227 	.if \v3 & 0x10
240  * @v3:		Third vector register designated operand (for RXB)
243  * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro
246 .macro	MRXB	m v1 v2=0 v3=0 v4=0
248 	RXB	rxb, \v1, \v2, \v3, \v4
258  * @v3:		Third vector register designated operand (for RXB)
261  * Note: For @v1, @v2, @v3, and @v4 also refer to the RXB macro
264 .macro	MRXBOPC	m opc v1 v2=0 v3=0 v4=0
265 	MRXB	\m, \v1, \v2, \v3, \v4
372 	VX_NUM	v3, \vr
373 	.word	0xE700 | (r1 << 4) | (v3&15)
375 	MRXBOPC	\m, 0x21, 0, v3
393 	VX_NUM	v3, \vto
395 	.word	0xE700 | ((v1&15) << 4) | (v3&15)
397 	MRXBOPC	\hint, 0x36, v1, v3
413 	VX_NUM	v3, \vto
415 	.word	0xE700 | ((v1&15) << 4) | (v3&15)
417 	MRXBOPC	\hint, 0x3E, v1, v3
424 	VX_NUM	v3, \vr3
427 	.word	((v3&15) << 12)
428 	MRXBOPC	(v4&15), 0x8C, v1, v2, v3, v4
453 	VX_NUM	v3, \vr3
455 	.word	((v3&15) << 12)
456 	MRXBOPC	\m4, 0x84, v1, v2, v3
462 	VX_NUM	v3, \vr3
463 	.word	0xE700 | ((v1&15) << 4) | (v3&15)
465 	MRXBOPC	\m4, 0x4D, v1, v3
484 	VX_NUM	v3, \vr3
486 	.word	((v3&15) << 12)
487 	MRXBOPC	\m4, 0x61, v1, v2, v3
506 	VX_NUM	v3, \vr3
508 	.word	((v3&15) << 12)
509 	MRXBOPC	\m4, 0x60, v1, v2, v3
550 	VX_NUM	v3, \vr3
552 	.word	((v3&15) << 12)
553 	MRXBOPC	0, 0x68, v1, v2, v3
560 	VX_NUM	v3, \vr3
562 	.word	((v3&15) << 12)
563 	MRXBOPC 0, 0x66, v1, v2, v3
570 	VX_NUM	v3, \vr3
572 	.word	((v3&15) << 12)
573 	MRXBOPC	0, 0x6D, v1, v2, v3
580 	VX_NUM	v3, \vr3
582 	.word	((v3&15) << 12)
583 	MRXBOPC	\m4, 0xB4, v1, v2, v3
602 	VX_NUM	v3, \vr3
605 	.word	((v3&15) << 12) | (\m5 << 8)
606 	MRXBOPC	(v4&15), 0xBC, v1, v2, v3, v4
625 	VX_NUM	v3, \vr3
627 	.word	((v3&15) << 12)
628 	MRXBOPC	0, 0x7D, v1, v2, v3
655 	VX_NUM	v3, \vr3
657 	.word	((v3&15) << 12)
658 	MRXBOPC	\m4, 0xF3, v1, v2, v3
680 	VX_NUM	v3, \vr3
682 	.word	((v3&15) << 12)
683 	MRXBOPC \m4, 0x7A, v1, v2, v3
702 	VX_NUM	v3, \vr3
704 	.word	0xE700 | ((v1&15) << 4) | (v3&15)
706 	MRXBOPC	\m4, 0x33, v1, v3
725 	VX_NUM	v3, \vr3
727 	.word	((v3&15) << 12) | (\imm4)
728 	MRXBOPC	0, 0x77, v1, v2, v3