riscv/net/bpf_jit.h

236 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd,
239 	return (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
243 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode)
245 	return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) |
249 static inline u32 rv_s_insn(u16 imm11_0, u8 rs2, u8 rs1, u8 funct3, u8 opcode)
253 	return (imm11_5 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
257 static inline u32 rv_b_insn(u16 imm12_1, u8 rs2, u8 rs1, u8 funct3, u8 opcode)
262 	return (imm12 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) |
281 static inline u32 rv_amo_insn(u8 funct5, u8 aq, u8 rl, u8 rs2, u8 rs1,
286 	return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode);
314 static inline u16 rv_cl_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rd,
317 	return (funct3 << 13) | (imm_hi << 10) | ((rs1 & 0x7) << 7) |
321 static inline u16 rv_cs_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rs2,
324 	return (funct3 << 13) | (imm_hi << 10) | ((rs1 & 0x7) << 7) |
344 static inline u32 rv_addi(u8 rd, u8 rs1, u16 imm11_0)
346 	return rv_i_insn(imm11_0, rs1, 0, rd, 0x13);
349 static inline u32 rv_andi(u8 rd, u8 rs1, u16 imm11_0)
351 	return rv_i_insn(imm11_0, rs1, 7, rd, 0x13);
354 static inline u32 rv_ori(u8 rd, u8 rs1, u16 imm11_0)
356 	return rv_i_insn(imm11_0, rs1, 6, rd, 0x13);
359 static inline u32 rv_xori(u8 rd, u8 rs1, u16 imm11_0)
361 	return rv_i_insn(imm11_0, rs1, 4, rd, 0x13);
364 static inline u32 rv_slli(u8 rd, u8 rs1, u16 imm11_0)
366 	return rv_i_insn(imm11_0, rs1, 1, rd, 0x13);
369 static inline u32 rv_srli(u8 rd, u8 rs1, u16 imm11_0)
371 	return rv_i_insn(imm11_0, rs1, 5, rd, 0x13);
374 static inline u32 rv_srai(u8 rd, u8 rs1, u16 imm11_0)
376 	return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x13);
389 static inline u32 rv_add(u8 rd, u8 rs1, u8 rs2)
391 	return rv_r_insn(0, rs2, rs1, 0, rd, 0x33);
394 static inline u32 rv_sub(u8 rd, u8 rs1, u8 rs2)
396 	return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x33);
399 static inline u32 rv_sltu(u8 rd, u8 rs1, u8 rs2)
401 	return rv_r_insn(0, rs2, rs1, 3, rd, 0x33);
404 static inline u32 rv_and(u8 rd, u8 rs1, u8 rs2)
406 	return rv_r_insn(0, rs2, rs1, 7, rd, 0x33);
409 static inline u32 rv_or(u8 rd, u8 rs1, u8 rs2)
411 	return rv_r_insn(0, rs2, rs1, 6, rd, 0x33);
414 static inline u32 rv_xor(u8 rd, u8 rs1, u8 rs2)
416 	return rv_r_insn(0, rs2, rs1, 4, rd, 0x33);
419 static inline u32 rv_sll(u8 rd, u8 rs1, u8 rs2)
421 	return rv_r_insn(0, rs2, rs1, 1, rd, 0x33);
424 static inline u32 rv_srl(u8 rd, u8 rs1, u8 rs2)
426 	return rv_r_insn(0, rs2, rs1, 5, rd, 0x33);
429 static inline u32 rv_sra(u8 rd, u8 rs1, u8 rs2)
431 	return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x33);
434 static inline u32 rv_mul(u8 rd, u8 rs1, u8 rs2)
436 	return rv_r_insn(1, rs2, rs1, 0, rd, 0x33);
439 static inline u32 rv_mulhu(u8 rd, u8 rs1, u8 rs2)
441 	return rv_r_insn(1, rs2, rs1, 3, rd, 0x33);
444 static inline u32 rv_div(u8 rd, u8 rs1, u8 rs2)
446 	return rv_r_insn(1, rs2, rs1, 4, rd, 0x33);
449 static inline u32 rv_divu(u8 rd, u8 rs1, u8 rs2)
451 	return rv_r_insn(1, rs2, rs1, 5, rd, 0x33);
454 static inline u32 rv_rem(u8 rd, u8 rs1, u8 rs2)
456 	return rv_r_insn(1, rs2, rs1, 6, rd, 0x33);
459 static inline u32 rv_remu(u8 rd, u8 rs1, u8 rs2)
461 	return rv_r_insn(1, rs2, rs1, 7, rd, 0x33);
469 static inline u32 rv_jalr(u8 rd, u8 rs1, u16 imm11_0)
471 	return rv_i_insn(imm11_0, rs1, 0, rd, 0x67);
474 static inline u32 rv_beq(u8 rs1, u8 rs2, u16 imm12_1)
476 	return rv_b_insn(imm12_1, rs2, rs1, 0, 0x63);
479 static inline u32 rv_bne(u8 rs1, u8 rs2, u16 imm12_1)
481 	return rv_b_insn(imm12_1, rs2, rs1, 1, 0x63);
484 static inline u32 rv_bltu(u8 rs1, u8 rs2, u16 imm12_1)
486 	return rv_b_insn(imm12_1, rs2, rs1, 6, 0x63);
489 static inline u32 rv_bgtu(u8 rs1, u8 rs2, u16 imm12_1)
491 	return rv_bltu(rs2, rs1, imm12_1);
494 static inline u32 rv_bgeu(u8 rs1, u8 rs2, u16 imm12_1)
496 	return rv_b_insn(imm12_1, rs2, rs1, 7, 0x63);
499 static inline u32 rv_bleu(u8 rs1, u8 rs2, u16 imm12_1)
501 	return rv_bgeu(rs2, rs1, imm12_1);
504 static inline u32 rv_blt(u8 rs1, u8 rs2, u16 imm12_1)
506 	return rv_b_insn(imm12_1, rs2, rs1, 4, 0x63);
509 static inline u32 rv_bgt(u8 rs1, u8 rs2, u16 imm12_1)
511 	return rv_blt(rs2, rs1, imm12_1);
514 static inline u32 rv_bge(u8 rs1, u8 rs2, u16 imm12_1)
516 	return rv_b_insn(imm12_1, rs2, rs1, 5, 0x63);
519 static inline u32 rv_ble(u8 rs1, u8 rs2, u16 imm12_1)
521 	return rv_bge(rs2, rs1, imm12_1);
524 static inline u32 rv_lb(u8 rd, u16 imm11_0, u8 rs1)
526 	return rv_i_insn(imm11_0, rs1, 0, rd, 0x03);
529 static inline u32 rv_lh(u8 rd, u16 imm11_0, u8 rs1)
531 	return rv_i_insn(imm11_0, rs1, 1, rd, 0x03);
534 static inline u32 rv_lw(u8 rd, u16 imm11_0, u8 rs1)
536 	return rv_i_insn(imm11_0, rs1, 2, rd, 0x03);
539 static inline u32 rv_lbu(u8 rd, u16 imm11_0, u8 rs1)
541 	return rv_i_insn(imm11_0, rs1, 4, rd, 0x03);
544 static inline u32 rv_lhu(u8 rd, u16 imm11_0, u8 rs1)
546 	return rv_i_insn(imm11_0, rs1, 5, rd, 0x03);
549 static inline u32 rv_sb(u8 rs1, u16 imm11_0, u8 rs2)
551 	return rv_s_insn(imm11_0, rs2, rs1, 0, 0x23);
554 static inline u32 rv_sh(u8 rs1, u16 imm11_0, u8 rs2)
556 	return rv_s_insn(imm11_0, rs2, rs1, 1, 0x23);
559 static inline u32 rv_sw(u8 rs1, u16 imm11_0, u8 rs2)
561 	return rv_s_insn(imm11_0, rs2, rs1, 2, 0x23);
564 static inline u32 rv_amoadd_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
566 	return rv_amo_insn(0, aq, rl, rs2, rs1, 2, rd, 0x2f);
569 static inline u32 rv_amoand_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
571 	return rv_amo_insn(0xc, aq, rl, rs2, rs1, 2, rd, 0x2f);
574 static inline u32 rv_amoor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
576 	return rv_amo_insn(0x8, aq, rl, rs2, rs1, 2, rd, 0x2f);
579 static inline u32 rv_amoxor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
581 	return rv_amo_insn(0x4, aq, rl, rs2, rs1, 2, rd, 0x2f);
584 static inline u32 rv_amoswap_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
586 	return rv_amo_insn(0x1, aq, rl, rs2, rs1, 2, rd, 0x2f);
589 static inline u32 rv_lr_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
591 	return rv_amo_insn(0x2, aq, rl, rs2, rs1, 2, rd, 0x2f);
594 static inline u32 rv_sc_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
596 	return rv_amo_insn(0x3, aq, rl, rs2, rs1, 2, rd, 0x2f);
622 static inline u16 rvc_lw(u8 rd, u32 imm7, u8 rs1)
628 	return rv_cl_insn(0x2, imm_hi, rs1, imm_lo, rd, 0x0);
631 static inline u16 rvc_sw(u8 rs1, u32 imm7, u8 rs2)
637 	return rv_cs_insn(0x6, imm_hi, rs1, imm_lo, rs2, 0x0);
712 static inline u16 rvc_jr(u8 rs1)
714 	return rv_cr_insn(0x8, rs1, RV_REG_ZERO, 0x2);
722 static inline u16 rvc_jalr(u8 rs1)
724 	return rv_cr_insn(0x9, rs1, RV_REG_ZERO, 0x2);
741 static inline u32 rvzbb_sextb(u8 rd, u8 rs1)
743 	return rv_i_insn(0x604, rs1, 1, rd, 0x13);
746 static inline u32 rvzbb_sexth(u8 rd, u8 rs1)
748 	return rv_i_insn(0x605, rs1, 1, rd, 0x13);
776 static inline u32 rv_addiw(u8 rd, u8 rs1, u16 imm11_0)
778 	return rv_i_insn(imm11_0, rs1, 0, rd, 0x1b);
781 static inline u32 rv_slliw(u8 rd, u8 rs1, u16 imm11_0)
783 	return rv_i_insn(imm11_0, rs1, 1, rd, 0x1b);
786 static inline u32 rv_srliw(u8 rd, u8 rs1, u16 imm11_0)
788 	return rv_i_insn(imm11_0, rs1, 5, rd, 0x1b);
791 static inline u32 rv_sraiw(u8 rd, u8 rs1, u16 imm11_0)
793 	return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x1b);
796 static inline u32 rv_addw(u8 rd, u8 rs1, u8 rs2)
798 	return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b);
801 static inline u32 rv_subw(u8 rd, u8 rs1, u8 rs2)
803 	return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x3b);
806 static inline u32 rv_sllw(u8 rd, u8 rs1, u8 rs2)
808 	return rv_r_insn(0, rs2, rs1, 1, rd, 0x3b);
811 static inline u32 rv_srlw(u8 rd, u8 rs1, u8 rs2)
813 	return rv_r_insn(0, rs2, rs1, 5, rd, 0x3b);
816 static inline u32 rv_sraw(u8 rd, u8 rs1, u8 rs2)
818 	return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x3b);
821 static inline u32 rv_mulw(u8 rd, u8 rs1, u8 rs2)
823 	return rv_r_insn(1, rs2, rs1, 0, rd, 0x3b);
826 static inline u32 rv_divw(u8 rd, u8 rs1, u8 rs2)
828 	return rv_r_insn(1, rs2, rs1, 4, rd, 0x3b);
831 static inline u32 rv_divuw(u8 rd, u8 rs1, u8 rs2)
833 	return rv_r_insn(1, rs2, rs1, 5, rd, 0x3b);
836 static inline u32 rv_remw(u8 rd, u8 rs1, u8 rs2)
838 	return rv_r_insn(1, rs2, rs1, 6, rd, 0x3b);
841 static inline u32 rv_remuw(u8 rd, u8 rs1, u8 rs2)
843 	return rv_r_insn(1, rs2, rs1, 7, rd, 0x3b);
846 static inline u32 rv_ld(u8 rd, u16 imm11_0, u8 rs1)
848 	return rv_i_insn(imm11_0, rs1, 3, rd, 0x03);
851 static inline u32 rv_lwu(u8 rd, u16 imm11_0, u8 rs1)
853 	return rv_i_insn(imm11_0, rs1, 6, rd, 0x03);
856 static inline u32 rv_sd(u8 rs1, u16 imm11_0, u8 rs2)
858 	return rv_s_insn(imm11_0, rs2, rs1, 3, 0x23);
861 static inline u32 rv_amoadd_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
863 	return rv_amo_insn(0, aq, rl, rs2, rs1, 3, rd, 0x2f);
866 static inline u32 rv_amoand_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
868 	return rv_amo_insn(0xc, aq, rl, rs2, rs1, 3, rd, 0x2f);
871 static inline u32 rv_amoor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
873 	return rv_amo_insn(0x8, aq, rl, rs2, rs1, 3, rd, 0x2f);
876 static inline u32 rv_amoxor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
878 	return rv_amo_insn(0x4, aq, rl, rs2, rs1, 3, rd, 0x2f);
881 static inline u32 rv_amoswap_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
883 	return rv_amo_insn(0x1, aq, rl, rs2, rs1, 3, rd, 0x2f);
886 static inline u32 rv_lr_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
888 	return rv_amo_insn(0x2, aq, rl, rs2, rs1, 3, rd, 0x2f);
891 static inline u32 rv_sc_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
893 	return rv_amo_insn(0x3, aq, rl, rs2, rs1, 3, rd, 0x2f);
898 static inline u16 rvc_ld(u8 rd, u32 imm8, u8 rs1)
904 	return rv_cl_insn(0x3, imm_hi, rs1, imm_lo, rd, 0x0);
907 static inline u16 rvc_sd(u8 rs1, u32 imm8, u8 rs2)
913 	return rv_cs_insn(0x7, imm_hi, rs1, imm_lo, rs2, 0x0);
964 static inline void emit_add(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
966 	if (rvc_enabled() && rd && rd == rs1 && rs2)
969 		emit(rv_add(rd, rs1, rs2), ctx);
1033 static inline void emit_sub(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1035 	if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1038 		emit(rv_sub(rd, rs1, rs2), ctx);
1041 static inline void emit_or(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1043 	if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1046 		emit(rv_or(rd, rs1, rs2), ctx);
1049 static inline void emit_and(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1051 	if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1054 		emit(rv_and(rd, rs1, rs2), ctx);
1057 static inline void emit_xor(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1059 	if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1062 		emit(rv_xor(rd, rs1, rs2), ctx);
1065 static inline void emit_lw(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1067 	if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_8b_uint(off) && !(off & 0x3))
1069 	else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_7b_uint(off) && !(off & 0x3))
1070 		emitc(rvc_lw(rd, off, rs1), ctx);
1072 		emit(rv_lw(rd, off, rs1), ctx);
1075 static inline void emit_sw(u8 rs1, s32 off, u8 rs2, struct rv_jit_context *ctx)
1077 	if (rvc_enabled() && rs1 == RV_REG_SP && is_8b_uint(off) && !(off & 0x3))
1079 	else if (rvc_enabled() && is_creg(rs1) && is_creg(rs2) && is_7b_uint(off) && !(off & 0x3))
1080 		emitc(rvc_sw(rs1, off, rs2), ctx);
1082 		emit(rv_sw(rs1, off, rs2), ctx);
1096 static inline void emit_ld(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1098 	if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_9b_uint(off) && !(off & 0x7))
1100 	else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_8b_uint(off) && !(off & 0x7))
1101 		emitc(rvc_ld(rd, off, rs1), ctx);
1103 		emit(rv_ld(rd, off, rs1), ctx);
1106 static inline void emit_sd(u8 rs1, s32 off, u8 rs2, struct rv_jit_context *ctx)
1108 	if (rvc_enabled() && rs1 == RV_REG_SP && is_9b_uint(off) && !(off & 0x7))
1110 	else if (rvc_enabled() && is_creg(rs1) && is_creg(rs2) && is_8b_uint(off) && !(off & 0x7))
1111 		emitc(rvc_sd(rs1, off, rs2), ctx);
1113 		emit(rv_sd(rs1, off, rs2), ctx);
1116 static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1118 	if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1121 		emit(rv_subw(rd, rs1, rs2), ctx);