Lines Matching refs:rd
234 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd,
238 (rd << 7) | opcode;
241 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode)
243 return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) |
264 static inline u32 rv_u_insn(u32 imm31_12, u8 rd, u8 opcode)
266 return (imm31_12 << 12) | (rd << 7) | opcode;
269 static inline u32 rv_j_insn(u32 imm20_1, u8 rd, u8 opcode)
276 return (imm << 12) | (rd << 7) | opcode;
280 u8 funct3, u8 rd, u8 opcode)
284 return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode);
289 static inline u16 rv_cr_insn(u8 funct4, u8 rd, u8 rs2, u8 op)
291 return (funct4 << 12) | (rd << 7) | (rs2 << 2) | op;
294 static inline u16 rv_ci_insn(u8 funct3, u32 imm6, u8 rd, u8 op)
299 return (funct3 << 13) | (rd << 7) | op | imm;
307 static inline u16 rv_ciw_insn(u8 funct3, u32 uimm, u8 rd, u8 op)
309 return (funct3 << 13) | (uimm << 5) | ((rd & 0x7) << 2) | op;
312 static inline u16 rv_cl_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rd,
316 (imm_lo << 5) | ((rd & 0x7) << 2) | op;
326 static inline u16 rv_ca_insn(u8 funct6, u8 rd, u8 funct2, u8 rs2, u8 op)
328 return (funct6 << 10) | ((rd & 0x7) << 7) | (funct2 << 5) |
332 static inline u16 rv_cb_insn(u8 funct3, u32 imm6, u8 funct2, u8 rd, u8 op)
337 return (funct3 << 13) | (funct2 << 10) | ((rd & 0x7) << 7) | op | imm;
342 static inline u32 rv_addi(u8 rd, u8 rs1, u16 imm11_0)
344 return rv_i_insn(imm11_0, rs1, 0, rd, 0x13);
347 static inline u32 rv_andi(u8 rd, u8 rs1, u16 imm11_0)
349 return rv_i_insn(imm11_0, rs1, 7, rd, 0x13);
352 static inline u32 rv_ori(u8 rd, u8 rs1, u16 imm11_0)
354 return rv_i_insn(imm11_0, rs1, 6, rd, 0x13);
357 static inline u32 rv_xori(u8 rd, u8 rs1, u16 imm11_0)
359 return rv_i_insn(imm11_0, rs1, 4, rd, 0x13);
362 static inline u32 rv_slli(u8 rd, u8 rs1, u16 imm11_0)
364 return rv_i_insn(imm11_0, rs1, 1, rd, 0x13);
367 static inline u32 rv_srli(u8 rd, u8 rs1, u16 imm11_0)
369 return rv_i_insn(imm11_0, rs1, 5, rd, 0x13);
372 static inline u32 rv_srai(u8 rd, u8 rs1, u16 imm11_0)
374 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x13);
377 static inline u32 rv_lui(u8 rd, u32 imm31_12)
379 return rv_u_insn(imm31_12, rd, 0x37);
382 static inline u32 rv_auipc(u8 rd, u32 imm31_12)
384 return rv_u_insn(imm31_12, rd, 0x17);
387 static inline u32 rv_add(u8 rd, u8 rs1, u8 rs2)
389 return rv_r_insn(0, rs2, rs1, 0, rd, 0x33);
392 static inline u32 rv_sub(u8 rd, u8 rs1, u8 rs2)
394 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x33);
397 static inline u32 rv_sltu(u8 rd, u8 rs1, u8 rs2)
399 return rv_r_insn(0, rs2, rs1, 3, rd, 0x33);
402 static inline u32 rv_and(u8 rd, u8 rs1, u8 rs2)
404 return rv_r_insn(0, rs2, rs1, 7, rd, 0x33);
407 static inline u32 rv_or(u8 rd, u8 rs1, u8 rs2)
409 return rv_r_insn(0, rs2, rs1, 6, rd, 0x33);
412 static inline u32 rv_xor(u8 rd, u8 rs1, u8 rs2)
414 return rv_r_insn(0, rs2, rs1, 4, rd, 0x33);
417 static inline u32 rv_sll(u8 rd, u8 rs1, u8 rs2)
419 return rv_r_insn(0, rs2, rs1, 1, rd, 0x33);
422 static inline u32 rv_srl(u8 rd, u8 rs1, u8 rs2)
424 return rv_r_insn(0, rs2, rs1, 5, rd, 0x33);
427 static inline u32 rv_sra(u8 rd, u8 rs1, u8 rs2)
429 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x33);
432 static inline u32 rv_mul(u8 rd, u8 rs1, u8 rs2)
434 return rv_r_insn(1, rs2, rs1, 0, rd, 0x33);
437 static inline u32 rv_mulhu(u8 rd, u8 rs1, u8 rs2)
439 return rv_r_insn(1, rs2, rs1, 3, rd, 0x33);
442 static inline u32 rv_div(u8 rd, u8 rs1, u8 rs2)
444 return rv_r_insn(1, rs2, rs1, 4, rd, 0x33);
447 static inline u32 rv_divu(u8 rd, u8 rs1, u8 rs2)
449 return rv_r_insn(1, rs2, rs1, 5, rd, 0x33);
452 static inline u32 rv_rem(u8 rd, u8 rs1, u8 rs2)
454 return rv_r_insn(1, rs2, rs1, 6, rd, 0x33);
457 static inline u32 rv_remu(u8 rd, u8 rs1, u8 rs2)
459 return rv_r_insn(1, rs2, rs1, 7, rd, 0x33);
462 static inline u32 rv_jal(u8 rd, u32 imm20_1)
464 return rv_j_insn(imm20_1, rd, 0x6f);
467 static inline u32 rv_jalr(u8 rd, u8 rs1, u16 imm11_0)
469 return rv_i_insn(imm11_0, rs1, 0, rd, 0x67);
522 static inline u32 rv_lb(u8 rd, u16 imm11_0, u8 rs1)
524 return rv_i_insn(imm11_0, rs1, 0, rd, 0x03);
527 static inline u32 rv_lh(u8 rd, u16 imm11_0, u8 rs1)
529 return rv_i_insn(imm11_0, rs1, 1, rd, 0x03);
532 static inline u32 rv_lw(u8 rd, u16 imm11_0, u8 rs1)
534 return rv_i_insn(imm11_0, rs1, 2, rd, 0x03);
537 static inline u32 rv_lbu(u8 rd, u16 imm11_0, u8 rs1)
539 return rv_i_insn(imm11_0, rs1, 4, rd, 0x03);
542 static inline u32 rv_lhu(u8 rd, u16 imm11_0, u8 rs1)
544 return rv_i_insn(imm11_0, rs1, 5, rd, 0x03);
562 static inline u32 rv_amoadd_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
564 return rv_amo_insn(0, aq, rl, rs2, rs1, 2, rd, 0x2f);
567 static inline u32 rv_amoand_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
569 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 2, rd, 0x2f);
572 static inline u32 rv_amoor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
574 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 2, rd, 0x2f);
577 static inline u32 rv_amoxor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
579 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 2, rd, 0x2f);
582 static inline u32 rv_amoswap_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
584 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 2, rd, 0x2f);
587 static inline u32 rv_lr_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
589 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 2, rd, 0x2f);
592 static inline u32 rv_sc_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
594 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 2, rd, 0x2f);
611 static inline u16 rvc_addi4spn(u8 rd, u32 imm10)
617 return rv_ciw_insn(0x0, imm, rd, 0x0);
620 static inline u16 rvc_lw(u8 rd, u32 imm7, u8 rs1)
626 return rv_cl_insn(0x2, imm_hi, rs1, imm_lo, rd, 0x0);
638 static inline u16 rvc_addi(u8 rd, u32 imm6)
640 return rv_ci_insn(0, imm6, rd, 0x1);
643 static inline u16 rvc_li(u8 rd, u32 imm6)
645 return rv_ci_insn(0x2, imm6, rd, 0x1);
657 static inline u16 rvc_lui(u8 rd, u32 imm6)
659 return rv_ci_insn(0x3, imm6, rd, 0x1);
662 static inline u16 rvc_srli(u8 rd, u32 imm6)
664 return rv_cb_insn(0x4, imm6, 0, rd, 0x1);
667 static inline u16 rvc_srai(u8 rd, u32 imm6)
669 return rv_cb_insn(0x4, imm6, 0x1, rd, 0x1);
672 static inline u16 rvc_andi(u8 rd, u32 imm6)
674 return rv_cb_insn(0x4, imm6, 0x2, rd, 0x1);
677 static inline u16 rvc_sub(u8 rd, u8 rs)
679 return rv_ca_insn(0x23, rd, 0, rs, 0x1);
682 static inline u16 rvc_xor(u8 rd, u8 rs)
684 return rv_ca_insn(0x23, rd, 0x1, rs, 0x1);
687 static inline u16 rvc_or(u8 rd, u8 rs)
689 return rv_ca_insn(0x23, rd, 0x2, rs, 0x1);
692 static inline u16 rvc_and(u8 rd, u8 rs)
694 return rv_ca_insn(0x23, rd, 0x3, rs, 0x1);
697 static inline u16 rvc_slli(u8 rd, u32 imm6)
699 return rv_ci_insn(0, imm6, rd, 0x2);
702 static inline u16 rvc_lwsp(u8 rd, u32 imm8)
707 return rv_ci_insn(0x2, imm, rd, 0x2);
715 static inline u16 rvc_mv(u8 rd, u8 rs)
717 return rv_cr_insn(0x8, rd, rs, 0x2);
725 static inline u16 rvc_add(u8 rd, u8 rs)
727 return rv_cr_insn(0x9, rd, rs, 0x2);
739 static inline u32 rvzbb_sextb(u8 rd, u8 rs1)
741 return rv_i_insn(0x604, rs1, 1, rd, 0x13);
744 static inline u32 rvzbb_sexth(u8 rd, u8 rs1)
746 return rv_i_insn(0x605, rs1, 1, rd, 0x13);
749 static inline u32 rvzbb_zexth(u8 rd, u8 rs)
752 return rv_i_insn(0x80, rs, 4, rd, 0x3b);
754 return rv_i_insn(0x80, rs, 4, rd, 0x33);
757 static inline u32 rvzbb_rev8(u8 rd, u8 rs)
760 return rv_i_insn(0x6b8, rs, 5, rd, 0x13);
762 return rv_i_insn(0x698, rs, 5, rd, 0x13);
774 static inline u32 rv_addiw(u8 rd, u8 rs1, u16 imm11_0)
776 return rv_i_insn(imm11_0, rs1, 0, rd, 0x1b);
779 static inline u32 rv_slliw(u8 rd, u8 rs1, u16 imm11_0)
781 return rv_i_insn(imm11_0, rs1, 1, rd, 0x1b);
784 static inline u32 rv_srliw(u8 rd, u8 rs1, u16 imm11_0)
786 return rv_i_insn(imm11_0, rs1, 5, rd, 0x1b);
789 static inline u32 rv_sraiw(u8 rd, u8 rs1, u16 imm11_0)
791 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x1b);
794 static inline u32 rv_addw(u8 rd, u8 rs1, u8 rs2)
796 return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b);
799 static inline u32 rv_subw(u8 rd, u8 rs1, u8 rs2)
801 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x3b);
804 static inline u32 rv_sllw(u8 rd, u8 rs1, u8 rs2)
806 return rv_r_insn(0, rs2, rs1, 1, rd, 0x3b);
809 static inline u32 rv_srlw(u8 rd, u8 rs1, u8 rs2)
811 return rv_r_insn(0, rs2, rs1, 5, rd, 0x3b);
814 static inline u32 rv_sraw(u8 rd, u8 rs1, u8 rs2)
816 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x3b);
819 static inline u32 rv_mulw(u8 rd, u8 rs1, u8 rs2)
821 return rv_r_insn(1, rs2, rs1, 0, rd, 0x3b);
824 static inline u32 rv_divw(u8 rd, u8 rs1, u8 rs2)
826 return rv_r_insn(1, rs2, rs1, 4, rd, 0x3b);
829 static inline u32 rv_divuw(u8 rd, u8 rs1, u8 rs2)
831 return rv_r_insn(1, rs2, rs1, 5, rd, 0x3b);
834 static inline u32 rv_remw(u8 rd, u8 rs1, u8 rs2)
836 return rv_r_insn(1, rs2, rs1, 6, rd, 0x3b);
839 static inline u32 rv_remuw(u8 rd, u8 rs1, u8 rs2)
841 return rv_r_insn(1, rs2, rs1, 7, rd, 0x3b);
844 static inline u32 rv_ld(u8 rd, u16 imm11_0, u8 rs1)
846 return rv_i_insn(imm11_0, rs1, 3, rd, 0x03);
849 static inline u32 rv_lwu(u8 rd, u16 imm11_0, u8 rs1)
851 return rv_i_insn(imm11_0, rs1, 6, rd, 0x03);
859 static inline u32 rv_amoadd_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
861 return rv_amo_insn(0, aq, rl, rs2, rs1, 3, rd, 0x2f);
864 static inline u32 rv_amoand_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
866 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 3, rd, 0x2f);
869 static inline u32 rv_amoor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
871 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 3, rd, 0x2f);
874 static inline u32 rv_amoxor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
876 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 3, rd, 0x2f);
879 static inline u32 rv_amoswap_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
881 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 3, rd, 0x2f);
884 static inline u32 rv_lr_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
886 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 3, rd, 0x2f);
889 static inline u32 rv_sc_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
891 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 3, rd, 0x2f);
896 static inline u16 rvc_ld(u8 rd, u32 imm8, u8 rs1)
902 return rv_cl_insn(0x3, imm_hi, rs1, imm_lo, rd, 0x0);
914 static inline u16 rvc_subw(u8 rd, u8 rs)
916 return rv_ca_insn(0x27, rd, 0, rs, 0x1);
919 static inline u16 rvc_addiw(u8 rd, u32 imm6)
921 return rv_ci_insn(0x1, imm6, rd, 0x1);
924 static inline u16 rvc_ldsp(u8 rd, u32 imm9)
929 return rv_ci_insn(0x3, imm, rd, 0x2);
944 static inline void emit_jalr(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
946 if (rvc_enabled() && rd == RV_REG_RA && rs && !imm)
948 else if (rvc_enabled() && !rd && rs && !imm)
951 emit(rv_jalr(rd, rs, imm), ctx);
954 static inline void emit_mv(u8 rd, u8 rs, struct rv_jit_context *ctx)
956 if (rvc_enabled() && rd && rs)
957 emitc(rvc_mv(rd, rs), ctx);
959 emit(rv_addi(rd, rs, 0), ctx);
962 static inline void emit_add(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
964 if (rvc_enabled() && rd && rd == rs1 && rs2)
965 emitc(rvc_add(rd, rs2), ctx);
967 emit(rv_add(rd, rs1, rs2), ctx);
970 static inline void emit_addi(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
972 if (rvc_enabled() && rd == RV_REG_SP && rd == rs && is_10b_int(imm) && imm && !(imm & 0xf))
974 else if (rvc_enabled() && is_creg(rd) && rs == RV_REG_SP && is_10b_uint(imm) &&
976 emitc(rvc_addi4spn(rd, imm), ctx);
977 else if (rvc_enabled() && rd && rd == rs && imm && is_6b_int(imm))
978 emitc(rvc_addi(rd, imm), ctx);
980 emit(rv_addi(rd, rs, imm), ctx);
983 static inline void emit_li(u8 rd, s32 imm, struct rv_jit_context *ctx)
985 if (rvc_enabled() && rd && is_6b_int(imm))
986 emitc(rvc_li(rd, imm), ctx);
988 emit(rv_addi(rd, RV_REG_ZERO, imm), ctx);
991 static inline void emit_lui(u8 rd, s32 imm, struct rv_jit_context *ctx)
993 if (rvc_enabled() && rd && rd != RV_REG_SP && is_6b_int(imm) && imm)
994 emitc(rvc_lui(rd, imm), ctx);
996 emit(rv_lui(rd, imm), ctx);
999 static inline void emit_slli(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1001 if (rvc_enabled() && rd && rd == rs && imm && (u32)imm < __riscv_xlen)
1002 emitc(rvc_slli(rd, imm), ctx);
1004 emit(rv_slli(rd, rs, imm), ctx);
1007 static inline void emit_andi(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1009 if (rvc_enabled() && is_creg(rd) && rd == rs && is_6b_int(imm))
1010 emitc(rvc_andi(rd, imm), ctx);
1012 emit(rv_andi(rd, rs, imm), ctx);
1015 static inline void emit_srli(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1017 if (rvc_enabled() && is_creg(rd) && rd == rs && imm && (u32)imm < __riscv_xlen)
1018 emitc(rvc_srli(rd, imm), ctx);
1020 emit(rv_srli(rd, rs, imm), ctx);
1023 static inline void emit_srai(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1025 if (rvc_enabled() && is_creg(rd) && rd == rs && imm && (u32)imm < __riscv_xlen)
1026 emitc(rvc_srai(rd, imm), ctx);
1028 emit(rv_srai(rd, rs, imm), ctx);
1031 static inline void emit_sub(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1033 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1034 emitc(rvc_sub(rd, rs2), ctx);
1036 emit(rv_sub(rd, rs1, rs2), ctx);
1039 static inline void emit_or(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1041 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1042 emitc(rvc_or(rd, rs2), ctx);
1044 emit(rv_or(rd, rs1, rs2), ctx);
1047 static inline void emit_and(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1049 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1050 emitc(rvc_and(rd, rs2), ctx);
1052 emit(rv_and(rd, rs1, rs2), ctx);
1055 static inline void emit_xor(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1057 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1058 emitc(rvc_xor(rd, rs2), ctx);
1060 emit(rv_xor(rd, rs1, rs2), ctx);
1063 static inline void emit_lw(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1065 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_8b_uint(off) && !(off & 0x3))
1066 emitc(rvc_lwsp(rd, off), ctx);
1067 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_7b_uint(off) && !(off & 0x3))
1068 emitc(rvc_lw(rd, off, rs1), ctx);
1070 emit(rv_lw(rd, off, rs1), ctx);
1086 static inline void emit_addiw(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1088 if (rvc_enabled() && rd && rd == rs && is_6b_int(imm))
1089 emitc(rvc_addiw(rd, imm), ctx);
1091 emit(rv_addiw(rd, rs, imm), ctx);
1094 static inline void emit_ld(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1096 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_9b_uint(off) && !(off & 0x7))
1097 emitc(rvc_ldsp(rd, off), ctx);
1098 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_8b_uint(off) && !(off & 0x7))
1099 emitc(rvc_ld(rd, off, rs1), ctx);
1101 emit(rv_ld(rd, off, rs1), ctx);
1114 static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1116 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1117 emitc(rvc_subw(rd, rs2), ctx);
1119 emit(rv_subw(rd, rs1, rs2), ctx);
1122 static inline void emit_sextb(u8 rd, u8 rs, struct rv_jit_context *ctx)
1125 emit(rvzbb_sextb(rd, rs), ctx);
1129 emit_slli(rd, rs, 56, ctx);
1130 emit_srai(rd, rd, 56, ctx);
1133 static inline void emit_sexth(u8 rd, u8 rs, struct rv_jit_context *ctx)
1136 emit(rvzbb_sexth(rd, rs), ctx);
1140 emit_slli(rd, rs, 48, ctx);
1141 emit_srai(rd, rd, 48, ctx);
1144 static inline void emit_sextw(u8 rd, u8 rs, struct rv_jit_context *ctx)
1146 emit_addiw(rd, rs, 0, ctx);
1149 static inline void emit_zexth(u8 rd, u8 rs, struct rv_jit_context *ctx)
1152 emit(rvzbb_zexth(rd, rs), ctx);
1156 emit_slli(rd, rs, 48, ctx);
1157 emit_srli(rd, rd, 48, ctx);
1160 static inline void emit_zextw(u8 rd, u8 rs, struct rv_jit_context *ctx)
1162 emit_slli(rd, rs, 32, ctx);
1163 emit_srli(rd, rd, 32, ctx);
1166 static inline void emit_bswap(u8 rd, s32 imm, struct rv_jit_context *ctx)
1171 emit(rvzbb_rev8(rd, rd), ctx);
1173 emit_srli(rd, rd, bits, ctx);
1179 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1182 emit_srli(rd, rd, 8, ctx);
1186 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1189 emit_srli(rd, rd, 8, ctx);
1191 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1194 emit_srli(rd, rd, 8, ctx);
1198 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1201 emit_srli(rd, rd, 8, ctx);
1203 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1206 emit_srli(rd, rd, 8, ctx);
1208 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1211 emit_srli(rd, rd, 8, ctx);
1213 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1216 emit_srli(rd, rd, 8, ctx);
1218 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1221 emit_mv(rd, RV_REG_T2, ctx);