Lines Matching defs:rd

236 static inline u32 rv_r_insn(u8 funct7, u8 rs2, u8 rs1, u8 funct3, u8 rd,
240 (rd << 7) | opcode;
243 static inline u32 rv_i_insn(u16 imm11_0, u8 rs1, u8 funct3, u8 rd, u8 opcode)
245 return (imm11_0 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7) |
266 static inline u32 rv_u_insn(u32 imm31_12, u8 rd, u8 opcode)
268 return (imm31_12 << 12) | (rd << 7) | opcode;
271 static inline u32 rv_j_insn(u32 imm20_1, u8 rd, u8 opcode)
278 return (imm << 12) | (rd << 7) | opcode;
282 u8 funct3, u8 rd, u8 opcode)
286 return rv_r_insn(funct7, rs2, rs1, funct3, rd, opcode);
291 static inline u16 rv_cr_insn(u8 funct4, u8 rd, u8 rs2, u8 op)
293 return (funct4 << 12) | (rd << 7) | (rs2 << 2) | op;
296 static inline u16 rv_ci_insn(u8 funct3, u32 imm6, u8 rd, u8 op)
301 return (funct3 << 13) | (rd << 7) | op | imm;
309 static inline u16 rv_ciw_insn(u8 funct3, u32 uimm, u8 rd, u8 op)
311 return (funct3 << 13) | (uimm << 5) | ((rd & 0x7) << 2) | op;
314 static inline u16 rv_cl_insn(u8 funct3, u32 imm_hi, u8 rs1, u32 imm_lo, u8 rd,
318 (imm_lo << 5) | ((rd & 0x7) << 2) | op;
328 static inline u16 rv_ca_insn(u8 funct6, u8 rd, u8 funct2, u8 rs2, u8 op)
330 return (funct6 << 10) | ((rd & 0x7) << 7) | (funct2 << 5) |
334 static inline u16 rv_cb_insn(u8 funct3, u32 imm6, u8 funct2, u8 rd, u8 op)
339 return (funct3 << 13) | (funct2 << 10) | ((rd & 0x7) << 7) | op | imm;
344 static inline u32 rv_addi(u8 rd, u8 rs1, u16 imm11_0)
346 return rv_i_insn(imm11_0, rs1, 0, rd, 0x13);
349 static inline u32 rv_andi(u8 rd, u8 rs1, u16 imm11_0)
351 return rv_i_insn(imm11_0, rs1, 7, rd, 0x13);
354 static inline u32 rv_ori(u8 rd, u8 rs1, u16 imm11_0)
356 return rv_i_insn(imm11_0, rs1, 6, rd, 0x13);
359 static inline u32 rv_xori(u8 rd, u8 rs1, u16 imm11_0)
361 return rv_i_insn(imm11_0, rs1, 4, rd, 0x13);
364 static inline u32 rv_slli(u8 rd, u8 rs1, u16 imm11_0)
366 return rv_i_insn(imm11_0, rs1, 1, rd, 0x13);
369 static inline u32 rv_srli(u8 rd, u8 rs1, u16 imm11_0)
371 return rv_i_insn(imm11_0, rs1, 5, rd, 0x13);
374 static inline u32 rv_srai(u8 rd, u8 rs1, u16 imm11_0)
376 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x13);
379 static inline u32 rv_lui(u8 rd, u32 imm31_12)
381 return rv_u_insn(imm31_12, rd, 0x37);
384 static inline u32 rv_auipc(u8 rd, u32 imm31_12)
386 return rv_u_insn(imm31_12, rd, 0x17);
389 static inline u32 rv_add(u8 rd, u8 rs1, u8 rs2)
391 return rv_r_insn(0, rs2, rs1, 0, rd, 0x33);
394 static inline u32 rv_sub(u8 rd, u8 rs1, u8 rs2)
396 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x33);
399 static inline u32 rv_sltu(u8 rd, u8 rs1, u8 rs2)
401 return rv_r_insn(0, rs2, rs1, 3, rd, 0x33);
404 static inline u32 rv_and(u8 rd, u8 rs1, u8 rs2)
406 return rv_r_insn(0, rs2, rs1, 7, rd, 0x33);
409 static inline u32 rv_or(u8 rd, u8 rs1, u8 rs2)
411 return rv_r_insn(0, rs2, rs1, 6, rd, 0x33);
414 static inline u32 rv_xor(u8 rd, u8 rs1, u8 rs2)
416 return rv_r_insn(0, rs2, rs1, 4, rd, 0x33);
419 static inline u32 rv_sll(u8 rd, u8 rs1, u8 rs2)
421 return rv_r_insn(0, rs2, rs1, 1, rd, 0x33);
424 static inline u32 rv_srl(u8 rd, u8 rs1, u8 rs2)
426 return rv_r_insn(0, rs2, rs1, 5, rd, 0x33);
429 static inline u32 rv_sra(u8 rd, u8 rs1, u8 rs2)
431 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x33);
434 static inline u32 rv_mul(u8 rd, u8 rs1, u8 rs2)
436 return rv_r_insn(1, rs2, rs1, 0, rd, 0x33);
439 static inline u32 rv_mulhu(u8 rd, u8 rs1, u8 rs2)
441 return rv_r_insn(1, rs2, rs1, 3, rd, 0x33);
444 static inline u32 rv_div(u8 rd, u8 rs1, u8 rs2)
446 return rv_r_insn(1, rs2, rs1, 4, rd, 0x33);
449 static inline u32 rv_divu(u8 rd, u8 rs1, u8 rs2)
451 return rv_r_insn(1, rs2, rs1, 5, rd, 0x33);
454 static inline u32 rv_rem(u8 rd, u8 rs1, u8 rs2)
456 return rv_r_insn(1, rs2, rs1, 6, rd, 0x33);
459 static inline u32 rv_remu(u8 rd, u8 rs1, u8 rs2)
461 return rv_r_insn(1, rs2, rs1, 7, rd, 0x33);
464 static inline u32 rv_jal(u8 rd, u32 imm20_1)
466 return rv_j_insn(imm20_1, rd, 0x6f);
469 static inline u32 rv_jalr(u8 rd, u8 rs1, u16 imm11_0)
471 return rv_i_insn(imm11_0, rs1, 0, rd, 0x67);
524 static inline u32 rv_lb(u8 rd, u16 imm11_0, u8 rs1)
526 return rv_i_insn(imm11_0, rs1, 0, rd, 0x03);
529 static inline u32 rv_lh(u8 rd, u16 imm11_0, u8 rs1)
531 return rv_i_insn(imm11_0, rs1, 1, rd, 0x03);
534 static inline u32 rv_lw(u8 rd, u16 imm11_0, u8 rs1)
536 return rv_i_insn(imm11_0, rs1, 2, rd, 0x03);
539 static inline u32 rv_lbu(u8 rd, u16 imm11_0, u8 rs1)
541 return rv_i_insn(imm11_0, rs1, 4, rd, 0x03);
544 static inline u32 rv_lhu(u8 rd, u16 imm11_0, u8 rs1)
546 return rv_i_insn(imm11_0, rs1, 5, rd, 0x03);
564 static inline u32 rv_amoadd_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
566 return rv_amo_insn(0, aq, rl, rs2, rs1, 2, rd, 0x2f);
569 static inline u32 rv_amoand_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
571 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 2, rd, 0x2f);
574 static inline u32 rv_amoor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
576 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 2, rd, 0x2f);
579 static inline u32 rv_amoxor_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
581 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 2, rd, 0x2f);
584 static inline u32 rv_amoswap_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
586 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 2, rd, 0x2f);
589 static inline u32 rv_lr_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
591 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 2, rd, 0x2f);
594 static inline u32 rv_sc_w(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
596 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 2, rd, 0x2f);
613 static inline u16 rvc_addi4spn(u8 rd, u32 imm10)
619 return rv_ciw_insn(0x0, imm, rd, 0x0);
622 static inline u16 rvc_lw(u8 rd, u32 imm7, u8 rs1)
628 return rv_cl_insn(0x2, imm_hi, rs1, imm_lo, rd, 0x0);
640 static inline u16 rvc_addi(u8 rd, u32 imm6)
642 return rv_ci_insn(0, imm6, rd, 0x1);
645 static inline u16 rvc_li(u8 rd, u32 imm6)
647 return rv_ci_insn(0x2, imm6, rd, 0x1);
659 static inline u16 rvc_lui(u8 rd, u32 imm6)
661 return rv_ci_insn(0x3, imm6, rd, 0x1);
664 static inline u16 rvc_srli(u8 rd, u32 imm6)
666 return rv_cb_insn(0x4, imm6, 0, rd, 0x1);
669 static inline u16 rvc_srai(u8 rd, u32 imm6)
671 return rv_cb_insn(0x4, imm6, 0x1, rd, 0x1);
674 static inline u16 rvc_andi(u8 rd, u32 imm6)
676 return rv_cb_insn(0x4, imm6, 0x2, rd, 0x1);
679 static inline u16 rvc_sub(u8 rd, u8 rs)
681 return rv_ca_insn(0x23, rd, 0, rs, 0x1);
684 static inline u16 rvc_xor(u8 rd, u8 rs)
686 return rv_ca_insn(0x23, rd, 0x1, rs, 0x1);
689 static inline u16 rvc_or(u8 rd, u8 rs)
691 return rv_ca_insn(0x23, rd, 0x2, rs, 0x1);
694 static inline u16 rvc_and(u8 rd, u8 rs)
696 return rv_ca_insn(0x23, rd, 0x3, rs, 0x1);
699 static inline u16 rvc_slli(u8 rd, u32 imm6)
701 return rv_ci_insn(0, imm6, rd, 0x2);
704 static inline u16 rvc_lwsp(u8 rd, u32 imm8)
709 return rv_ci_insn(0x2, imm, rd, 0x2);
717 static inline u16 rvc_mv(u8 rd, u8 rs)
719 return rv_cr_insn(0x8, rd, rs, 0x2);
727 static inline u16 rvc_add(u8 rd, u8 rs)
729 return rv_cr_insn(0x9, rd, rs, 0x2);
741 static inline u32 rvzbb_sextb(u8 rd, u8 rs1)
743 return rv_i_insn(0x604, rs1, 1, rd, 0x13);
746 static inline u32 rvzbb_sexth(u8 rd, u8 rs1)
748 return rv_i_insn(0x605, rs1, 1, rd, 0x13);
751 static inline u32 rvzbb_zexth(u8 rd, u8 rs)
754 return rv_i_insn(0x80, rs, 4, rd, 0x3b);
756 return rv_i_insn(0x80, rs, 4, rd, 0x33);
759 static inline u32 rvzbb_rev8(u8 rd, u8 rs)
762 return rv_i_insn(0x6b8, rs, 5, rd, 0x13);
764 return rv_i_insn(0x698, rs, 5, rd, 0x13);
776 static inline u32 rv_addiw(u8 rd, u8 rs1, u16 imm11_0)
778 return rv_i_insn(imm11_0, rs1, 0, rd, 0x1b);
781 static inline u32 rv_slliw(u8 rd, u8 rs1, u16 imm11_0)
783 return rv_i_insn(imm11_0, rs1, 1, rd, 0x1b);
786 static inline u32 rv_srliw(u8 rd, u8 rs1, u16 imm11_0)
788 return rv_i_insn(imm11_0, rs1, 5, rd, 0x1b);
791 static inline u32 rv_sraiw(u8 rd, u8 rs1, u16 imm11_0)
793 return rv_i_insn(0x400 | imm11_0, rs1, 5, rd, 0x1b);
796 static inline u32 rv_addw(u8 rd, u8 rs1, u8 rs2)
798 return rv_r_insn(0, rs2, rs1, 0, rd, 0x3b);
801 static inline u32 rv_subw(u8 rd, u8 rs1, u8 rs2)
803 return rv_r_insn(0x20, rs2, rs1, 0, rd, 0x3b);
806 static inline u32 rv_sllw(u8 rd, u8 rs1, u8 rs2)
808 return rv_r_insn(0, rs2, rs1, 1, rd, 0x3b);
811 static inline u32 rv_srlw(u8 rd, u8 rs1, u8 rs2)
813 return rv_r_insn(0, rs2, rs1, 5, rd, 0x3b);
816 static inline u32 rv_sraw(u8 rd, u8 rs1, u8 rs2)
818 return rv_r_insn(0x20, rs2, rs1, 5, rd, 0x3b);
821 static inline u32 rv_mulw(u8 rd, u8 rs1, u8 rs2)
823 return rv_r_insn(1, rs2, rs1, 0, rd, 0x3b);
826 static inline u32 rv_divw(u8 rd, u8 rs1, u8 rs2)
828 return rv_r_insn(1, rs2, rs1, 4, rd, 0x3b);
831 static inline u32 rv_divuw(u8 rd, u8 rs1, u8 rs2)
833 return rv_r_insn(1, rs2, rs1, 5, rd, 0x3b);
836 static inline u32 rv_remw(u8 rd, u8 rs1, u8 rs2)
838 return rv_r_insn(1, rs2, rs1, 6, rd, 0x3b);
841 static inline u32 rv_remuw(u8 rd, u8 rs1, u8 rs2)
843 return rv_r_insn(1, rs2, rs1, 7, rd, 0x3b);
846 static inline u32 rv_ld(u8 rd, u16 imm11_0, u8 rs1)
848 return rv_i_insn(imm11_0, rs1, 3, rd, 0x03);
851 static inline u32 rv_lwu(u8 rd, u16 imm11_0, u8 rs1)
853 return rv_i_insn(imm11_0, rs1, 6, rd, 0x03);
861 static inline u32 rv_amoadd_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
863 return rv_amo_insn(0, aq, rl, rs2, rs1, 3, rd, 0x2f);
866 static inline u32 rv_amoand_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
868 return rv_amo_insn(0xc, aq, rl, rs2, rs1, 3, rd, 0x2f);
871 static inline u32 rv_amoor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
873 return rv_amo_insn(0x8, aq, rl, rs2, rs1, 3, rd, 0x2f);
876 static inline u32 rv_amoxor_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
878 return rv_amo_insn(0x4, aq, rl, rs2, rs1, 3, rd, 0x2f);
881 static inline u32 rv_amoswap_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
883 return rv_amo_insn(0x1, aq, rl, rs2, rs1, 3, rd, 0x2f);
886 static inline u32 rv_lr_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
888 return rv_amo_insn(0x2, aq, rl, rs2, rs1, 3, rd, 0x2f);
891 static inline u32 rv_sc_d(u8 rd, u8 rs2, u8 rs1, u8 aq, u8 rl)
893 return rv_amo_insn(0x3, aq, rl, rs2, rs1, 3, rd, 0x2f);
898 static inline u16 rvc_ld(u8 rd, u32 imm8, u8 rs1)
904 return rv_cl_insn(0x3, imm_hi, rs1, imm_lo, rd, 0x0);
916 static inline u16 rvc_subw(u8 rd, u8 rs)
918 return rv_ca_insn(0x27, rd, 0, rs, 0x1);
921 static inline u16 rvc_addiw(u8 rd, u32 imm6)
923 return rv_ci_insn(0x1, imm6, rd, 0x1);
926 static inline u16 rvc_ldsp(u8 rd, u32 imm9)
931 return rv_ci_insn(0x3, imm, rd, 0x2);
946 static inline void emit_jalr(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
948 if (rvc_enabled() && rd == RV_REG_RA && rs && !imm)
950 else if (rvc_enabled() && !rd && rs && !imm)
953 emit(rv_jalr(rd, rs, imm), ctx);
956 static inline void emit_mv(u8 rd, u8 rs, struct rv_jit_context *ctx)
958 if (rvc_enabled() && rd && rs)
959 emitc(rvc_mv(rd, rs), ctx);
961 emit(rv_addi(rd, rs, 0), ctx);
964 static inline void emit_add(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
966 if (rvc_enabled() && rd && rd == rs1 && rs2)
967 emitc(rvc_add(rd, rs2), ctx);
969 emit(rv_add(rd, rs1, rs2), ctx);
972 static inline void emit_addi(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
974 if (rvc_enabled() && rd == RV_REG_SP && rd == rs && is_10b_int(imm) && imm && !(imm & 0xf))
976 else if (rvc_enabled() && is_creg(rd) && rs == RV_REG_SP && is_10b_uint(imm) &&
978 emitc(rvc_addi4spn(rd, imm), ctx);
979 else if (rvc_enabled() && rd && rd == rs && imm && is_6b_int(imm))
980 emitc(rvc_addi(rd, imm), ctx);
982 emit(rv_addi(rd, rs, imm), ctx);
985 static inline void emit_li(u8 rd, s32 imm, struct rv_jit_context *ctx)
987 if (rvc_enabled() && rd && is_6b_int(imm))
988 emitc(rvc_li(rd, imm), ctx);
990 emit(rv_addi(rd, RV_REG_ZERO, imm), ctx);
993 static inline void emit_lui(u8 rd, s32 imm, struct rv_jit_context *ctx)
995 if (rvc_enabled() && rd && rd != RV_REG_SP && is_6b_int(imm) && imm)
996 emitc(rvc_lui(rd, imm), ctx);
998 emit(rv_lui(rd, imm), ctx);
1001 static inline void emit_slli(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1003 if (rvc_enabled() && rd && rd == rs && imm && (u32)imm < __riscv_xlen)
1004 emitc(rvc_slli(rd, imm), ctx);
1006 emit(rv_slli(rd, rs, imm), ctx);
1009 static inline void emit_andi(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1011 if (rvc_enabled() && is_creg(rd) && rd == rs && is_6b_int(imm))
1012 emitc(rvc_andi(rd, imm), ctx);
1014 emit(rv_andi(rd, rs, imm), ctx);
1017 static inline void emit_srli(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1019 if (rvc_enabled() && is_creg(rd) && rd == rs && imm && (u32)imm < __riscv_xlen)
1020 emitc(rvc_srli(rd, imm), ctx);
1022 emit(rv_srli(rd, rs, imm), ctx);
1025 static inline void emit_srai(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1027 if (rvc_enabled() && is_creg(rd) && rd == rs && imm && (u32)imm < __riscv_xlen)
1028 emitc(rvc_srai(rd, imm), ctx);
1030 emit(rv_srai(rd, rs, imm), ctx);
1033 static inline void emit_sub(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1035 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1036 emitc(rvc_sub(rd, rs2), ctx);
1038 emit(rv_sub(rd, rs1, rs2), ctx);
1041 static inline void emit_or(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1043 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1044 emitc(rvc_or(rd, rs2), ctx);
1046 emit(rv_or(rd, rs1, rs2), ctx);
1049 static inline void emit_and(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1051 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1052 emitc(rvc_and(rd, rs2), ctx);
1054 emit(rv_and(rd, rs1, rs2), ctx);
1057 static inline void emit_xor(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1059 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1060 emitc(rvc_xor(rd, rs2), ctx);
1062 emit(rv_xor(rd, rs1, rs2), ctx);
1065 static inline void emit_lw(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1067 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_8b_uint(off) && !(off & 0x3))
1068 emitc(rvc_lwsp(rd, off), ctx);
1069 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_7b_uint(off) && !(off & 0x3))
1070 emitc(rvc_lw(rd, off, rs1), ctx);
1072 emit(rv_lw(rd, off, rs1), ctx);
1088 static inline void emit_addiw(u8 rd, u8 rs, s32 imm, struct rv_jit_context *ctx)
1090 if (rvc_enabled() && rd && rd == rs && is_6b_int(imm))
1091 emitc(rvc_addiw(rd, imm), ctx);
1093 emit(rv_addiw(rd, rs, imm), ctx);
1096 static inline void emit_ld(u8 rd, s32 off, u8 rs1, struct rv_jit_context *ctx)
1098 if (rvc_enabled() && rs1 == RV_REG_SP && rd && is_9b_uint(off) && !(off & 0x7))
1099 emitc(rvc_ldsp(rd, off), ctx);
1100 else if (rvc_enabled() && is_creg(rd) && is_creg(rs1) && is_8b_uint(off) && !(off & 0x7))
1101 emitc(rvc_ld(rd, off, rs1), ctx);
1103 emit(rv_ld(rd, off, rs1), ctx);
1116 static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx)
1118 if (rvc_enabled() && is_creg(rd) && rd == rs1 && is_creg(rs2))
1119 emitc(rvc_subw(rd, rs2), ctx);
1121 emit(rv_subw(rd, rs1, rs2), ctx);
1124 static inline void emit_sextb(u8 rd, u8 rs, struct rv_jit_context *ctx)
1127 emit(rvzbb_sextb(rd, rs), ctx);
1131 emit_slli(rd, rs, 56, ctx);
1132 emit_srai(rd, rd, 56, ctx);
1135 static inline void emit_sexth(u8 rd, u8 rs, struct rv_jit_context *ctx)
1138 emit(rvzbb_sexth(rd, rs), ctx);
1142 emit_slli(rd, rs, 48, ctx);
1143 emit_srai(rd, rd, 48, ctx);
1146 static inline void emit_sextw(u8 rd, u8 rs, struct rv_jit_context *ctx)
1148 emit_addiw(rd, rs, 0, ctx);
1151 static inline void emit_zexth(u8 rd, u8 rs, struct rv_jit_context *ctx)
1154 emit(rvzbb_zexth(rd, rs), ctx);
1158 emit_slli(rd, rs, 48, ctx);
1159 emit_srli(rd, rd, 48, ctx);
1162 static inline void emit_zextw(u8 rd, u8 rs, struct rv_jit_context *ctx)
1164 emit_slli(rd, rs, 32, ctx);
1165 emit_srli(rd, rd, 32, ctx);
1168 static inline void emit_bswap(u8 rd, s32 imm, struct rv_jit_context *ctx)
1173 emit(rvzbb_rev8(rd, rd), ctx);
1175 emit_srli(rd, rd, bits, ctx);
1181 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1184 emit_srli(rd, rd, 8, ctx);
1188 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1191 emit_srli(rd, rd, 8, ctx);
1193 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1196 emit_srli(rd, rd, 8, ctx);
1200 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1203 emit_srli(rd, rd, 8, ctx);
1205 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1208 emit_srli(rd, rd, 8, ctx);
1210 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1213 emit_srli(rd, rd, 8, ctx);
1215 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1218 emit_srli(rd, rd, 8, ctx);
1220 emit_andi(RV_REG_T1, rd, 0xff, ctx);
1223 emit_mv(rd, RV_REG_T2, ctx);