Lines Matching refs:fcr

164 	unsigned long		fcr;
190 fcr = MACIO_IN32(OHARE_FCR);
192 if (!(fcr & OH_SCC_ENABLE)) {
193 fcr |= OH_SCC_ENABLE;
201 fcr &= ~HRW_SCC_TRANS_EN_N;
202 MACIO_OUT32(OHARE_FCR, fcr);
203 fcr |= (rmask = HRW_RESET_SCC);
204 MACIO_OUT32(OHARE_FCR, fcr);
206 fcr |= (rmask = OH_SCC_RESET);
207 MACIO_OUT32(OHARE_FCR, fcr);
213 fcr &= ~rmask;
214 MACIO_OUT32(OHARE_FCR, fcr);
217 fcr |= OH_SCCA_IO;
219 fcr |= OH_SCCB_IO;
220 MACIO_OUT32(OHARE_FCR, fcr);
229 fcr = MACIO_IN32(OHARE_FCR);
231 fcr &= ~OH_SCCA_IO;
233 fcr &= ~OH_SCCB_IO;
234 MACIO_OUT32(OHARE_FCR, fcr);
235 if ((fcr & (OH_SCCA_IO | OH_SCCB_IO)) == 0) {
236 fcr &= ~OH_SCC_ENABLE;
238 fcr |= HRW_SCC_TRANS_EN_N;
239 MACIO_OUT32(OHARE_FCR, fcr);
604 u32 fcr;
621 fcr = MACIO_IN32(KEYLARGO_FCR0);
623 if (!(fcr & KL0_SCC_CELL_ENABLE)) {
624 fcr |= KL0_SCC_CELL_ENABLE;
628 fcr |= KL0_SCCA_ENABLE;
631 fcr &= ~KL0_SCC_A_INTF_ENABLE;
633 fcr |= KL0_SCC_A_INTF_ENABLE;
636 fcr |= KL0_SCCB_ENABLE;
639 fcr &= ~KL0_SCC_B_INTF_ENABLE;
640 fcr |= KL0_IRDA_ENABLE;
641 fcr |= KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE;
642 fcr |= KL0_IRDA_SOURCE1_SEL;
643 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
644 fcr &= ~(KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
647 fcr |= KL0_SCC_B_INTF_ENABLE;
649 MACIO_OUT32(KEYLARGO_FCR0, fcr);
674 fcr = MACIO_IN32(KEYLARGO_FCR0);
676 fcr &= ~KL0_SCCA_ENABLE;
678 fcr &= ~KL0_SCCB_ENABLE;
681 fcr &= ~KL0_IRDA_ENABLE;
682 fcr &= ~(KL0_IRDA_CLK32_ENABLE | KL0_IRDA_CLK19_ENABLE);
683 fcr &= ~(KL0_IRDA_FAST_CONNECT|KL0_IRDA_DEFAULT1|KL0_IRDA_DEFAULT0);
684 fcr &= ~(KL0_IRDA_SOURCE1_SEL|KL0_IRDA_SOURCE2_SEL|KL0_IRDA_HIGH_BAND);
687 MACIO_OUT32(KEYLARGO_FCR0, fcr);
688 if ((fcr & (KL0_SCCA_ENABLE | KL0_SCCB_ENABLE)) == 0) {
689 fcr &= ~KL0_SCC_CELL_ENABLE;
690 MACIO_OUT32(KEYLARGO_FCR0, fcr);