Lines Matching refs:ctx

17 	struct spu_context *ctx = spu->ctx;
26 if (ctx) {
30 ctx->csa.class_0_pending = spu->class_0_pending;
31 ctx->csa.class_0_dar = spu->class_0_dar;
34 ctx->csa.class_1_dsisr = spu->class_1_dsisr;
35 ctx->csa.class_1_dar = spu->class_1_dar;
45 wake_up_all(&ctx->stop_wq);
49 int spu_stopped(struct spu_context *ctx, u32 *stat)
58 *stat = ctx->ops->status_read(ctx);
69 if (test_bit(SPU_SCHED_NOTIFY_ACTIVE, &ctx->sched_flags))
72 dsisr = ctx->csa.class_1_dsisr;
76 if (ctx->csa.class_0_pending)
82 static int spu_setup_isolated(struct spu_context *ctx)
102 spu_unmap_mappings(ctx);
104 mfc_cntl = &ctx->spu->priv2->mfc_control_RW;
125 sr1 = spu_mfc_sr1_get(ctx->spu);
127 spu_mfc_sr1_set(ctx->spu, sr1);
130 ctx->ops->signal1_write(ctx, (unsigned long)isolated_loader >> 32);
131 ctx->ops->signal2_write(ctx,
134 ctx->ops->runcntl_write(ctx,
139 while (((status = ctx->ops->status_read(ctx)) & status_loading) ==
154 ctx->ops->runcntl_write(ctx, SPU_RUNCNTL_RUNNABLE);
162 ctx->ops->runcntl_write(ctx, SPU_RUNCNTL_STOP);
170 spu_mfc_sr1_set(ctx->spu, sr1);
176 static int spu_run_init(struct spu_context *ctx, u32 *npc)
181 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
187 if (ctx->flags & SPU_CREATE_NOSCHED) {
188 if (ctx->state == SPU_STATE_SAVED) {
189 ret = spu_activate(ctx, 0);
198 if (ctx->flags & SPU_CREATE_ISOLATE) {
199 if (!(ctx->ops->status_read(ctx) & SPU_STATUS_ISOLATED_STATE)) {
200 ret = spu_setup_isolated(ctx);
209 runcntl = ctx->ops->runcntl_read(ctx) &
221 ctx->ops->privcntl_write(ctx, privcntl);
222 ctx->ops->npc_write(ctx, *npc);
225 ctx->ops->runcntl_write(ctx, runcntl);
227 if (ctx->flags & SPU_CREATE_NOSCHED) {
228 spuctx_switch_state(ctx, SPU_UTIL_USER);
231 if (ctx->state == SPU_STATE_SAVED) {
232 ret = spu_activate(ctx, 0);
236 spuctx_switch_state(ctx, SPU_UTIL_USER);
240 set_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags);
244 static int spu_run_fini(struct spu_context *ctx, u32 *npc,
249 spu_del_from_rq(ctx);
251 *status = ctx->ops->status_read(ctx);
252 *npc = ctx->ops->npc_read(ctx);
254 spuctx_switch_state(ctx, SPU_UTIL_IDLE_LOADED);
255 clear_bit(SPU_SCHED_SPU_RUN, &ctx->sched_flags);
256 spu_switch_log_notify(NULL, ctx, SWITCH_LOG_EXIT, *status);
257 spu_release(ctx);
273 static int spu_handle_restartsys(struct spu_context *ctx, long *spu_ret,
309 static int spu_process_callback(struct spu_context *ctx)
318 npc = ctx->ops->npc_read(ctx) & ~3;
319 ls = (void __iomem *)ctx->ops->get_ls(ctx);
331 spu_release(ctx);
335 ret = spu_handle_restartsys(ctx, &spu_ret, &npc);
337 mutex_lock(&ctx->state_mutex);
344 ls = (void __iomem *)ctx->ops->get_ls(ctx);
348 ctx->ops->npc_write(ctx, npc);
349 ctx->ops->runcntl_write(ctx, SPU_RUNCNTL_RUNNABLE);
353 long spufs_run_spu(struct spu_context *ctx, u32 *npc, u32 *event)
358 if (mutex_lock_interruptible(&ctx->run_mutex))
361 ctx->event_return = 0;
363 ret = spu_acquire(ctx);
367 spu_enable_spu(ctx);
369 spu_update_sched_info(ctx);
371 ret = spu_run_init(ctx, npc);
373 spu_release(ctx);
378 ret = spufs_wait(ctx->stop_wq, spu_stopped(ctx, &status));
385 mutex_lock(&ctx->state_mutex);
389 &ctx->sched_flags))) {
394 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);
398 ret = spu_process_callback(ctx);
403 ret = spufs_handle_class1(ctx);
407 ret = spufs_handle_class0(ctx);
417 spu_disable_spu(ctx);
418 ret = spu_run_fini(ctx, npc, &status);
419 spu_yield(ctx);
423 ctx->stats.libassist++;
447 *event = ctx->event_return;
449 mutex_unlock(&ctx->run_mutex);