cell/spufs/hw_ops.c

24 static int spu_hw_mbox_read(struct spu_context *ctx, u32 * data)
26 	struct spu *spu = ctx->spu;
41 static u32 spu_hw_mbox_stat_read(struct spu_context *ctx)
43 	return in_be32(&ctx->spu->problem->mb_stat_R);
46 static __poll_t spu_hw_mbox_stat_poll(struct spu_context *ctx, __poll_t events)
48 	struct spu *spu = ctx->spu;
82 static int spu_hw_ibox_read(struct spu_context *ctx, u32 * data)
84 	struct spu *spu = ctx->spu;
103 static int spu_hw_wbox_write(struct spu_context *ctx, u32 data)
105 	struct spu *spu = ctx->spu;
124 static void spu_hw_signal1_write(struct spu_context *ctx, u32 data)
126 	out_be32(&ctx->spu->problem->signal_notify1, data);
129 static void spu_hw_signal2_write(struct spu_context *ctx, u32 data)
131 	out_be32(&ctx->spu->problem->signal_notify2, data);
134 static void spu_hw_signal1_type_set(struct spu_context *ctx, u64 val)
136 	struct spu *spu = ctx->spu;
150 static u64 spu_hw_signal1_type_get(struct spu_context *ctx)
152 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 1) != 0);
155 static void spu_hw_signal2_type_set(struct spu_context *ctx, u64 val)
157 	struct spu *spu = ctx->spu;
171 static u64 spu_hw_signal2_type_get(struct spu_context *ctx)
173 	return ((in_be64(&ctx->spu->priv2->spu_cfg_RW) & 2) != 0);
176 static u32 spu_hw_npc_read(struct spu_context *ctx)
178 	return in_be32(&ctx->spu->problem->spu_npc_RW);
181 static void spu_hw_npc_write(struct spu_context *ctx, u32 val)
183 	out_be32(&ctx->spu->problem->spu_npc_RW, val);
186 static u32 spu_hw_status_read(struct spu_context *ctx)
188 	return in_be32(&ctx->spu->problem->spu_status_R);
191 static char *spu_hw_get_ls(struct spu_context *ctx)
193 	return ctx->spu->local_store;
196 static void spu_hw_privcntl_write(struct spu_context *ctx, u64 val)
198 	out_be64(&ctx->spu->priv2->spu_privcntl_RW, val);
201 static u32 spu_hw_runcntl_read(struct spu_context *ctx)
203 	return in_be32(&ctx->spu->problem->spu_runcntl_RW);
206 static void spu_hw_runcntl_write(struct spu_context *ctx, u32 val)
208 	spin_lock_irq(&ctx->spu->register_lock);
210 		spu_hw_privcntl_write(ctx,
212 	out_be32(&ctx->spu->problem->spu_runcntl_RW, val);
213 	spin_unlock_irq(&ctx->spu->register_lock);
216 static void spu_hw_runcntl_stop(struct spu_context *ctx)
218 	spin_lock_irq(&ctx->spu->register_lock);
219 	out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP);
220 	while (in_be32(&ctx->spu->problem->spu_status_R) & SPU_STATUS_RUNNING)
222 	spin_unlock_irq(&ctx->spu->register_lock);
225 static void spu_hw_master_start(struct spu_context *ctx)
227 	struct spu *spu = ctx->spu;
236 static void spu_hw_master_stop(struct spu_context *ctx)
238 	struct spu *spu = ctx->spu;
247 static int spu_hw_set_mfc_query(struct spu_context * ctx, u32 mask, u32 mode)
249 	struct spu_problem __iomem *prob = ctx->spu->problem;
252 	spin_lock_irq(&ctx->spu->register_lock);
260 	spin_unlock_irq(&ctx->spu->register_lock);
264 static u32 spu_hw_read_mfc_tagstatus(struct spu_context * ctx)
266 	return in_be32(&ctx->spu->problem->dma_tagstatus_R);
269 static u32 spu_hw_get_mfc_free_elements(struct spu_context *ctx)
271 	return in_be32(&ctx->spu->problem->dma_qstatus_R);
274 static int spu_hw_send_mfc_command(struct spu_context *ctx,
278 	struct spu_problem __iomem *prob = ctx->spu->problem;
280 	spin_lock_irq(&ctx->spu->register_lock);
288 	spin_unlock_irq(&ctx->spu->register_lock);
300 static void spu_hw_restart_dma(struct spu_context *ctx)
302 	struct spu_priv2 __iomem *priv2 = ctx->spu->priv2;
304 	if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &ctx->spu->flags))