Lines Matching refs:ctx
23 static void spufs_handle_event(struct spu_context *ctx,
26 if (ctx->flags & SPU_CREATE_EVENTS_ENABLED) {
27 ctx->event_return |= type;
28 wake_up_all(&ctx->stop_wq);
37 ctx->ops->restart_dma(ctx);
48 ctx->ops->npc_read(ctx) - 4);
53 int spufs_handle_class0(struct spu_context *ctx)
55 unsigned long stat = ctx->csa.class_0_pending & CLASS0_INTR_MASK;
61 spufs_handle_event(ctx, ctx->csa.class_0_dar,
65 spufs_handle_event(ctx, ctx->csa.class_0_dar,
69 spufs_handle_event(ctx, ctx->csa.class_0_dar,
72 ctx->csa.class_0_pending = 0;
86 int spufs_handle_class1(struct spu_context *ctx)
102 ea = ctx->csa.class_1_dar;
103 dsisr = ctx->csa.class_1_dsisr;
108 spuctx_switch_state(ctx, SPU_UTIL_IOWAIT);
110 pr_debug("ctx %p: ea %016llx, dsisr %016llx state %d\n", ctx, ea,
111 dsisr, ctx->state);
113 ctx->stats.hash_flt++;
114 if (ctx->state == SPU_STATE_RUNNABLE)
115 ctx->spu->stats.hash_flt++;
118 spu_release(ctx);
134 mutex_lock(&ctx->state_mutex);
141 ctx->csa.class_1_dar = ctx->csa.class_1_dsisr = 0;
150 ctx->stats.maj_flt++;
152 ctx->stats.min_flt++;
153 if (ctx->state == SPU_STATE_RUNNABLE) {
155 ctx->spu->stats.maj_flt++;
157 ctx->spu->stats.min_flt++;
160 if (ctx->spu)
161 ctx->ops->restart_dma(ctx);
163 spufs_handle_event(ctx, ea, SPE_EVENT_SPE_DATA_STORAGE);
165 spuctx_switch_state(ctx, SPU_UTIL_SYSTEM);