Lines Matching defs:rd
33 #define VSX_REGISTER_XTP(rd) ((((rd) & 1) << 5) | ((rd) & 0xfe))
1168 struct instruction_op *op, int rd,
1177 op->reg = rd;
1361 unsigned int opcode, ra, rb, rc, rd, spr, u;
1412 rd = 7 - ((word >> 23) & 0x7);
1414 rd *= 4;
1417 op->ccval = (regs->ccr & ~(0xfUL << rd)) | (val << rd);
1452 rd = (word >> 21) & 0x1f;
1456 op->ccval = (regs->ccr & ~(1UL << (31 - rd))) |
1457 (val << (31 - rd));
1484 rd = (word >> 21) & 0x1f;
1497 rd = (suffix >> 21) & 0x1f;
1498 op->reg = rd;
1499 op->val = regs->gpr[rd];
1515 if (rd & trap_compare(regs->gpr[ra], (short) word))
1520 if (rd & trap_compare((int)regs->gpr[ra], (short) word))
1567 add_with_carry(regs, op, rd, ~regs->gpr[ra], imm, 1);
1574 if ((rd & 1) == 0)
1577 do_cmp_unsigned(regs, op, val, imm, rd >> 2);
1584 if ((rd & 1) == 0)
1587 do_cmp_signed(regs, op, val, imm, rd >> 2);
1592 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0);
1597 add_with_carry(regs, op, rd, regs->gpr[ra], imm, 0);
1631 val = DATA32(regs->gpr[rd]);
1639 val = DATA32(regs->gpr[rd]);
1647 val = DATA32(regs->gpr[rd]);
1652 op->val = regs->gpr[rd] | (unsigned short) word;
1657 op->val = regs->gpr[rd] | (imm << 16);
1661 op->val = regs->gpr[rd] ^ (unsigned short) word;
1666 op->val = regs->gpr[rd] ^ (imm << 16);
1670 op->val = regs->gpr[rd] & (unsigned short) word;
1676 op->val = regs->gpr[rd] & (imm << 16);
1683 val = regs->gpr[rd];
1733 if (rd == 0x1f ||
1734 (rd & trap_compare((int)regs->gpr[ra],
1740 if (rd & trap_compare(regs->gpr[ra], regs->gpr[rb]))
1748 op->reg = rd;
1754 op->reg = rd;
1762 op->reg = rd;
1808 val = regs->gpr[rd];
1821 op->reg = rd;
1831 op->val = regs->gpr[rd];
1845 if ((rd & 1) == 0) {
1851 do_cmp_signed(regs, op, val, val2, rd >> 2);
1858 if ((rd & 1) == 0) {
1864 do_cmp_unsigned(regs, op, val, val2, rd >> 2);
1868 do_cmpb(regs, op, regs->gpr[rd], regs->gpr[rb]);
1875 add_with_carry(regs, op, rd, ~regs->gpr[ra],
1885 add_with_carry(regs, op, rd, regs->gpr[ra],
1913 add_with_carry(regs, op, rd, ~regs->gpr[ra],
1918 add_with_carry(regs, op, rd, regs->gpr[ra],
1923 add_with_carry(regs, op, rd, ~regs->gpr[ra], 0L,
1928 add_with_carry(regs, op, rd, regs->gpr[ra], 0L,
1933 add_with_carry(regs, op, rd, ~regs->gpr[ra], -1L,
1942 add_with_carry(regs, op, rd, regs->gpr[ra], -1L,
2040 val = (unsigned int) regs->gpr[rd];
2045 val = regs->gpr[rd];
2050 op->val = regs->gpr[rd] & regs->gpr[rb];
2054 op->val = regs->gpr[rd] & ~regs->gpr[rb];
2058 do_popcnt(regs, op, regs->gpr[rd], 8);
2062 op->val = ~(regs->gpr[rd] | regs->gpr[rb]);
2066 do_prty(regs, op, regs->gpr[rd], 32);
2070 do_prty(regs, op, regs->gpr[rd], 64);
2074 do_bpermd(regs, op, regs->gpr[rd], regs->gpr[rb]);
2078 op->val = ~(regs->gpr[rd] ^ regs->gpr[rb]);
2082 op->val = regs->gpr[rd] ^ regs->gpr[rb];
2086 do_popcnt(regs, op, regs->gpr[rd], 32);
2090 op->val = regs->gpr[rd] | ~regs->gpr[rb];
2094 op->val = regs->gpr[rd] | regs->gpr[rb];
2098 op->val = ~(regs->gpr[rd] & regs->gpr[rb]);
2102 do_popcnt(regs, op, regs->gpr[rd], 64);
2108 val = (unsigned int) regs->gpr[rd];
2115 val = regs->gpr[rd];
2120 op->val = (signed short) regs->gpr[rd];
2124 op->val = (signed char) regs->gpr[rd];
2128 op->val = (signed int) regs->gpr[rd];
2138 op->val = (regs->gpr[rd] << sh) & 0xffffffffUL;
2146 op->val = (regs->gpr[rd] & 0xffffffffUL) >> sh;
2154 ival = (signed int) regs->gpr[rd];
2167 ival = (signed int) regs->gpr[rd];
2181 op->val = regs->gpr[rd] << sh;
2189 op->val = regs->gpr[rd] >> sh;
2197 ival = (signed long int) regs->gpr[rd];
2211 ival = (signed long int) regs->gpr[rd];
2227 val = (signed int) regs->gpr[rd];
2252 op->reg = rd;
2258 op->reg = rd;
2279 op->reg = rd;
2280 op->val = regs->gpr[rd];
2324 if (!((rd & 1) || rd == ra || rd == rb))
2329 if (!(rd & 1))
2503 op->val = byterev_8(regs->gpr[rd]);
2513 op->val = byterev_4(regs->gpr[rd]);
2529 op->val = byterev_2(regs->gpr[rd]);
2534 op->reg = rd | ((word & 1) << 5);
2540 op->reg = rd | ((word & 1) << 5);
2546 op->reg = rd | ((word & 1) << 5);
2554 op->reg = rd | ((word & 1) << 5);
2565 op->reg = rd | ((word & 1) << 5);
2577 op->reg = rd | ((word & 1) << 5);
2586 op->reg = VSX_REGISTER_XTP(rd);
2594 op->reg = rd | ((word & 1) << 5);
2603 op->reg = rd | ((word & 1) << 5);
2614 op->reg = rd | ((word & 1) << 5);
2628 op->reg = VSX_REGISTER_XTP(rd);
2633 op->reg = rd | ((word & 1) << 5);
2640 op->reg = rd | ((word & 1) << 5);
2646 op->reg = rd | ((word & 1) << 5);
2653 op->reg = rd | ((word & 1) << 5);
2659 op->reg = rd | ((word & 1) << 5);
2667 op->reg = rd | ((word & 1) << 5);
2676 op->reg = rd | ((word & 1) << 5);
2685 op->reg = rd | ((word & 1) << 5);
2692 op->reg = rd | ((word & 1) << 5);
2700 op->reg = rd | ((word & 1) << 5);
2707 op->reg = rd | ((word & 1) << 5);
2715 op->reg = rd | ((word & 1) << 5);
2724 op->reg = rd | ((word & 1) << 5);
2733 op->reg = rd | ((word & 1) << 5);
2740 op->reg = rd | ((word & 1) << 5);
2748 op->reg = rd | ((word & 1) << 5);
2801 if (ra >= rd)
2803 op->type = MKOP(LOAD_MULTI, 0, 4 * (32 - rd));
2808 op->type = MKOP(STORE_MULTI, 0, 4 * (32 - rd));
2840 if (!((rd & 1) || (rd == ra)))
2851 if (rd & 1)
2858 op->reg = rd + 32;
2866 op->reg = rd + 32;
2897 op->reg = VSX_REGISTER_XTP(rd);
2922 op->reg = rd + 32;
2933 op->reg = rd + 32;
2944 op->reg = rd + 32;
2955 op->reg = rd + 32;
2975 if (!(rd & 1))
2987 rd = (suffix >> 21) & 0x1f;
2988 op->reg = rd;
2989 op->val = regs->gpr[rd];
3004 op->reg = rd + 32;
3010 op->reg = rd + 32;
3016 op->reg = rd + 32;
3022 op->reg = rd + 32;
3036 op->reg = rd + 32;
3052 op->reg = VSX_REGISTER_XTP(rd);
3065 op->reg = VSX_REGISTER_XTP(rd);
3124 if (ra == rd)
3161 op->reg = rd;
3327 int i, rd, nb;
3471 rd = op->reg;
3483 regs->gpr[rd] = v32;
3486 rd = (rd + 1) & 0x1f;
3541 rd = op->reg;
3543 unsigned int v32 = regs->gpr[rd];
3555 rd = (rd + 1) & 0x1f;