Lines Matching refs:msr
488 pr_err("pc = %.16lx msr = %.16llx trap = %x\n",
489 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
810 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
1645 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1647 vcpu->arch.shregs.msr);
1947 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1975 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n",
4115 unsigned long msr, i;
4121 msr = mfmsr();
4122 kvmppc_msr_hard_disable_set_facilities(vcpu, msr);
4166 unsigned long msr;
4172 msr = mfmsr();
4184 kvmppc_msr_hard_disable_set_facilities(vcpu, msr);
4189 msr = mfmsr(); /* TM restore can update msr */
4197 vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
4233 vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
4924 unsigned long msr;
4945 (current->thread.regs->msr & MSR_TM)) {
4946 if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
4970 msr = 0;
4972 msr |= MSR_FP;
4974 msr |= MSR_VEC;
4976 msr |= MSR_VSX;
4980 msr |= MSR_TM;
4981 msr = msr_check_and_set(msr);