powerpc/kernel/head_book3s_32.S

77  * pointer (r1) points to just below the end of the half-meg region
253  * (Other exception handlers assume that r1 is a valid kernel stack
260 	mtspr	SPRN_SPRG_SCRATCH2,r1
261 	mfspr	r1, SPRN_SPRG_THREAD
262 	lwz	r1, RTAS_SP(r1)
263 	cmpwi	cr1, r1, 0
265 	mfspr	r1, SPRN_SPRG_SCRATCH2
301 	lwz	r5, _DSISR(r1)
307 	REST_NVGPRS(r1)
348 	REST_NVGPRS(r1)
356 	REST_NVGPRS(r1)
416  * r1:	linux style pte ( later becomes ppc hardware pte )
423 	lis	r1, TASK_SIZE@h		/* check if kernel address */
424 	cmplw	0,r1,r3
427 	li	r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
442 	andc.	r1,r1,r2		/* check access & ~permission */
448 	ori	r1, r1, 0xe06		/* clear out reserved bits */
449 	andc	r1, r2, r1		/* PP = user? 1 : 0 */
451 	rlwinm	r1,r1,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
453 	mtspr	SPRN_RPA,r1
460 	rlwinm	r1,r3,9,6,6	/* Get load/store bit */
462 	addis	r1,r1,0x2000
463 	mtspr	SPRN_DSISR,r1	/* (shouldn't be needed) */
465 	or	r2,r2,r1
467 	mfspr	r1,SPRN_IMISS	/* Get failing address */
470 	xor	r1,r1,r2
471 	mtspr	SPRN_DAR,r1	/* Set fault address */
485  * r1:	linux style pte ( later becomes ppc hardware pte )
491 	lis	r1, TASK_SIZE@h		/* check if kernel address */
492 	cmplw	0,r1,r3
494 	li	r1, _PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_READ
507 	andc.	r1,r1,r2		/* check access & ~permission */
510 	rlwinm	r1,r2,32-9,30,30	/* _PAGE_WRITE -> PP msb */
512 	rlwimi	r1,r2,32-3,24,24	/* _PAGE_WRITE -> _PAGE_DIRTY */
513 	xori	r1,r1,_PAGE_DIRTY	/* clear dirty when not rw */
514 	ori	r1,r1,0xe04		/* clear out reserved bits */
515 	andc	r1,r2,r1		/* PP = user? rw? 1: 3: 0 */
517 	rlwinm	r1,r1,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
519 	mtspr	SPRN_RPA,r1
522 	mfspr	r1,SPRN_SPRG_603_LRU
525 	xor	r1,r0,r1
526 	srw	r0,r1,r2
527 	mtspr   SPRN_SPRG_603_LRU,r1
542 	rlwinm	r1,r3,9,6,6	/* Get load/store bit */
543 	addis	r1,r1,0x2000
544 	mtspr	SPRN_DSISR,r1
547 	mfspr	r1,SPRN_DMISS	/* Get failing address */
550 	xori	r1,r1,3
551 20:	mtspr	SPRN_DAR,r1	/* Set fault address */
565  * r1:	linux style pte ( later becomes ppc hardware pte )
571 	lis	r1, TASK_SIZE@h		/* check if kernel address */
572 	cmplw	0,r1,r3
574 	li	r1, _PAGE_RW | _PAGE_DIRTY | _PAGE_PRESENT | _PAGE_ACCESSED
587 	andc.	r1,r1,r2		/* check access & ~permission */
591 	li	r1,0xe06		/* clear out reserved bits & PP msb */
592 	andc	r1,r2,r1		/* PP = user? 1: 0 */
594 	rlwinm	r1,r1,0,~_PAGE_COHERENT	/* clear M (coherence not required) */
596 	mtspr	SPRN_RPA,r1
601 	mfspr	r1,SPRN_SPRG_603_LRU
604 	xor	r1,r0,r1
605 	srw	r0,r1,r2
606 	mtspr   SPRN_SPRG_603_LRU,r1
845 	tophys(r1,r2)
846 	lwz	r1,TASK_STACK(r1)
849 	addi	r1,r1,THREAD_SIZE-STACK_FRAME_MIN_SIZE
851 	tophys(r3,r1)
974 	lis	r1,init_thread_union@ha
975 	addi	r1,r1,init_thread_union@l
977 	stwu	r0,THREAD_SIZE-STACK_FRAME_MIN_SIZE(r1)