Lines Matching defs:edev

239 	struct eeh_dev *edev, *tmp;
249 eeh_pe_for_each_dev(pe, edev, tmp)
250 fn(edev, flag);
296 * @edev: EEH device
299 * Add EEH device to the PE in edev->pe_config_addr. If a PE already
300 * exists with that address then @edev is added to that PE. Otherwise
307 int eeh_pe_tree_insert(struct eeh_dev *edev, struct eeh_pe *new_pe_parent)
309 struct pci_controller *hose = edev->controller;
318 pe = eeh_pe_get(hose, edev->pe_config_addr);
321 list_add_tail(&edev->entry, &pe->edevs);
322 edev->pe = pe;
335 eeh_edev_dbg(edev, "Added to existing PE (parent: PE#%x)\n",
340 edev->pe = pe;
342 /* Put the edev to PE */
343 list_add_tail(&edev->entry, &pe->edevs);
344 eeh_edev_dbg(edev, "Added to bus PE\n");
350 if (edev->physfn)
359 pe->addr = edev->pe_config_addr;
372 edev->pe = NULL;
386 list_add_tail(&edev->entry, &pe->edevs);
387 edev->pe = pe;
388 eeh_edev_dbg(edev, "Added to new (parent: PE#%x)\n",
396 * @edev: EEH device
403 int eeh_pe_tree_remove(struct eeh_dev *edev)
409 pe = eeh_dev_to_pe(edev);
411 eeh_edev_dbg(edev, "No PE found for device.\n");
416 edev->pe = NULL;
417 list_del(&edev->entry);
455 * remove edev's while traversing the PE tree which
537 struct eeh_dev *edev;
542 list_for_each_entry(edev, &pe->edevs, entry) {
543 pdev = eeh_dev_to_pci_dev(edev);
554 static void __eeh_pe_dev_mode_mark(struct eeh_dev *edev, void *flag)
558 edev->mode |= mode;
585 struct eeh_dev *edev, *tmp;
607 eeh_pe_for_each_dev(pe, edev, tmp) {
608 pdev = eeh_dev_to_pci_dev(edev);
632 static void eeh_bridge_check_link(struct eeh_dev *edev)
642 if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
645 eeh_edev_dbg(edev, "Checking PCIe link...\n");
648 cap = edev->pcie_cap;
649 eeh_ops->read_config(edev, cap + PCI_EXP_SLTSTA, 2, &val);
651 eeh_edev_dbg(edev, "No card in the slot (0x%04x) !\n", val);
656 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCAP, 2, &val);
658 eeh_ops->read_config(edev, cap + PCI_EXP_SLTCTL, 2, &val);
660 eeh_edev_dbg(edev, "In power-off state, power it on ...\n");
663 eeh_ops->write_config(edev, cap + PCI_EXP_SLTCTL, 2, val);
669 eeh_ops->read_config(edev, cap + PCI_EXP_LNKCTL, 2, &val);
671 eeh_ops->write_config(edev, cap + PCI_EXP_LNKCTL, 2, val);
674 if (!edev->pdev->link_active_reporting) {
675 eeh_edev_dbg(edev, "No link reporting capability\n");
686 eeh_ops->read_config(edev, cap + PCI_EXP_LNKSTA, 2, &val);
692 eeh_edev_dbg(edev, "Link up (%s)\n",
695 eeh_edev_dbg(edev, "Link not ready (0x%04x)\n", val);
699 #define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
701 static void eeh_restore_bridge_bars(struct eeh_dev *edev)
710 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);
712 eeh_ops->write_config(edev, 14*4, 4, edev->config_space[14]);
715 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,
717 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,
720 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);
723 eeh_ops->write_config(edev, PCI_COMMAND, 4, edev->config_space[1] |
727 eeh_bridge_check_link(edev);
730 static void eeh_restore_device_bars(struct eeh_dev *edev)
736 eeh_ops->write_config(edev, i*4, 4, edev->config_space[i]);
738 eeh_ops->write_config(edev, 12*4, 4, edev->config_space[12]);
740 eeh_ops->write_config(edev, PCI_CACHE_LINE_SIZE, 1,
742 eeh_ops->write_config(edev, PCI_LATENCY_TIMER, 1,
746 eeh_ops->write_config(edev, 15*4, 4, edev->config_space[15]);
752 eeh_ops->read_config(edev, PCI_COMMAND, 4, &cmd);
753 if (edev->config_space[1] & PCI_COMMAND_PARITY)
757 if (edev->config_space[1] & PCI_COMMAND_SERR)
761 eeh_ops->write_config(edev, PCI_COMMAND, 4, cmd);
773 static void eeh_restore_one_device_bars(struct eeh_dev *edev, void *flag)
776 if (edev->mode & EEH_DEV_BRIDGE)
777 eeh_restore_bridge_bars(edev);
779 eeh_restore_device_bars(edev);
782 eeh_ops->restore_config(edev);
850 struct eeh_dev *edev;
861 edev = list_first_entry_or_null(&pe->edevs, struct eeh_dev, entry);
862 pdev = eeh_dev_to_pci_dev(edev);