include/asm/mpic_msgr.h

23 /* Get a message register
25  * @reg_num:	the MPIC message register to get
27  * A pointer to the message register is returned.  If
28  * the message register asked for is already in use, then
30  * with an actual message register, then ENODEV is returned.
35 /* Relinquish a message register
37  * @msgr:	the message register to return
39  * Disables the given message register and marks it as free.
40  * After this call has completed successully the message
46 /* Enable a message register
48  * @msgr:	the message register to enable
50  * The given message register is enabled for sending
55 /* Disable a message register
57  * @msgr:	the message register to disable
59  * The given message register is disabled for sending
64 /* Write a message to a message register
66  * @msgr:	the message register to write to
67  * @message:	the message to write
69  * The given 32-bit message is written to the given message
70  * register.  Writing to an enabled message registers fires
73 static inline void mpic_msgr_write(struct mpic_msgr *msgr, u32 message)
75 	out_be32(msgr->base, message);
78 /* Read a message from a message register
80  * @msgr:	the message register to read from
82  * Returns the 32-bit value currently in the given message register.
91 /* Clear a message register
93  * @msgr:	the message register to clear
95  * Clears any interrupts associated with the given message register.
102 /* Set the destination CPU for the message register
104  * @msgr:	the message register whose destination is to be set
105  * @cpu_num:	the Linux CPU number to bind the message register to
116 /* Get the IRQ number for the message register
117  * @msgr:	the message register whose IRQ is to be returned
119  * Returns the IRQ number associated with the given message register.
120  * 0 is returned if this message register is not capable of receiving
121  * interrupts.  What message register can and cannot receive interrupts is