Lines Matching refs:cache_info

59 struct pdc_cache_info cache_info __ro_after_init;
128 cache_info.ic_size/1024 );
129 if (cache_info.dc_loop != 1)
130 snprintf(buf, 32, "%lu-way associative", cache_info.dc_loop);
132 cache_info.dc_size/1024,
133 (cache_info.dc_conf.cc_wt ? "WT":"WB"),
134 (cache_info.dc_conf.cc_sh ? ", shared I/D":""),
135 ((cache_info.dc_loop == 1) ? "direct mapped" : buf),
136 cache_info.dc_conf.cc_alias
139 cache_info.it_size,
140 cache_info.dt_size,
141 cache_info.dt_conf.tc_sh ? " - shared with ITLB":""
169 if (pdc_cache_info(&cache_info) < 0)
174 cache_info.ic_size,
175 cache_info.dc_size,
176 cache_info.it_size);
179 cache_info.dc_base,
180 cache_info.dc_stride,
181 cache_info.dc_count,
182 cache_info.dc_loop);
185 *(unsigned long *) (&cache_info.dc_conf),
186 cache_info.dc_conf.cc_alias,
187 cache_info.dc_conf.cc_block,
188 cache_info.dc_conf.cc_line,
189 cache_info.dc_conf.cc_shift);
191 cache_info.dc_conf.cc_wt,
192 cache_info.dc_conf.cc_sh,
193 cache_info.dc_conf.cc_cst,
194 cache_info.dc_conf.cc_hv);
197 cache_info.ic_base,
198 cache_info.ic_stride,
199 cache_info.ic_count,
200 cache_info.ic_loop);
203 cache_info.it_sp_base,
204 cache_info.it_sp_stride,
205 cache_info.it_sp_count,
206 cache_info.it_loop,
207 cache_info.it_off_base,
208 cache_info.it_off_stride,
209 cache_info.it_off_count);
212 cache_info.dt_sp_base,
213 cache_info.dt_sp_stride,
214 cache_info.dt_sp_count,
215 cache_info.dt_loop,
216 cache_info.dt_off_base,
217 cache_info.dt_off_stride,
218 cache_info.dt_off_count);
221 *(unsigned long *) (&cache_info.ic_conf),
222 cache_info.ic_conf.cc_alias,
223 cache_info.ic_conf.cc_block,
224 cache_info.ic_conf.cc_line,
225 cache_info.ic_conf.cc_shift);
227 cache_info.ic_conf.cc_wt,
228 cache_info.ic_conf.cc_sh,
229 cache_info.ic_conf.cc_cst,
230 cache_info.ic_conf.cc_hv);
233 cache_info.dt_conf.tc_sh,
234 cache_info.dt_conf.tc_page,
235 cache_info.dt_conf.tc_cst,
236 cache_info.dt_conf.tc_aid,
237 cache_info.dt_conf.tc_sr);
240 cache_info.it_conf.tc_sh,
241 cache_info.it_conf.tc_page,
242 cache_info.it_conf.tc_cst,
243 cache_info.it_conf.tc_aid,
244 cache_info.it_conf.tc_sr);
248 if (cache_info.dt_conf.tc_sh == 0 || cache_info.dt_conf.tc_sh == 2) {
249 if (cache_info.dt_conf.tc_sh == 2)
263 dcache_stride = CAFL_STRIDE(cache_info.dc_conf);
264 icache_stride = CAFL_STRIDE(cache_info.ic_conf);
268 WARN_ON(cache_info.dc_size && dcache_stride == 0);
269 WARN_ON(cache_info.ic_size && icache_stride == 0);
548 threshold2 = cache_info.dc_size * num_online_cpus();
558 threshold = max(cache_info.it_size, cache_info.dt_size);