Lines Matching refs:tmp
60 unsigned int tmp = get_bank_config(i);
61 if (!(tmp & SGIMC_MCONFIG_BVALID))
64 size = get_bank_size(tmp);
65 addr = get_bank_addr(tmp);
77 u32 tmp;
94 tmp = sgimc->cpuctrl0;
95 tmp &= ~SGIMC_CCTRL0_WDOG;
96 sgimc->cpuctrl0 = tmp;
109 tmp = sgimc->cpuctrl0;
111 tmp |= SGIMC_CCTRL0_EPERRGIO | SGIMC_CCTRL0_EPERRMEM;
113 tmp |= SGIMC_CCTRL0_R4KNOCHKPARR;
114 sgimc->cpuctrl0 = tmp;
119 tmp = sgimc->cpuctrl1;
120 tmp &= ~0xf;
121 tmp |= 0xd;
122 sgimc->cpuctrl1 = tmp;
148 tmp = sgimc->giopar & SGIMC_GIOPAR_GFX64; /* keep gfx 64bit settings */
149 tmp |= SGIMC_GIOPAR_HPC64; /* All 1st HPC's interface at 64bits */
150 tmp |= SGIMC_GIOPAR_ONEBUS; /* Only one physical GIO bus exists */
155 tmp |= SGIMC_GIOPAR_HPC264; /* 2nd HPC at 64bits */
156 tmp |= SGIMC_GIOPAR_PLINEEXP0; /* exp0 pipelines */
157 tmp |= SGIMC_GIOPAR_MASTEREXP1; /* exp1 masters */
158 tmp |= SGIMC_GIOPAR_RTIMEEXP0; /* exp0 is realtime */
160 tmp |= SGIMC_GIOPAR_HPC264; /* 2nd HPC 64bits */
161 tmp |= SGIMC_GIOPAR_PLINEEXP0; /* exp[01] pipelined */
162 tmp |= SGIMC_GIOPAR_PLINEEXP1;
163 tmp |= SGIMC_GIOPAR_MASTEREISA; /* EISA masters */
167 tmp |= SGIMC_GIOPAR_EISA64; /* MC talks to EISA at 64bits */
168 tmp |= SGIMC_GIOPAR_MASTEREISA; /* EISA bus can act as master */
170 sgimc->giopar = tmp; /* poof */