Lines Matching refs:mem_access
564 union cvmx_npi_mem_access_subidx mem_access;
598 mem_access.u64 = 0;
599 mem_access.s.esr = 1; /* Endian-Swap on read. */
600 mem_access.s.esw = 1; /* Endian-Swap on write. */
601 mem_access.s.nsr = 0; /* No-Snoop on read. */
602 mem_access.s.nsw = 0; /* No-Snoop on write. */
603 mem_access.s.ror = 0; /* Relax Read on read. */
604 mem_access.s.row = 0; /* Relax Order on write. */
605 mem_access.s.ba = 0; /* PCI Address bits [63:36]. */
606 cvmx_write_csr(CVMX_NPI_MEM_ACCESS_SUBID3, mem_access.u64);